Kinetis® K20-120 MHz, Full-Speed USB, Mixed-Signal Integration Microcontrollers (MCUs) based on Arm® Cortex®-M4 Core



Kinetis K2x MCU Family Block Diagram

Kinetis K2x MCU Family Block Diagram



  • 10 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents of <500 nA, run currents of <200 µA/MHz, 4 µs wake-up from Stop mode
  • Full memory and analog operation down to 1.71 volts for extended battery life
  • Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes
  • Low-power timer for continual system operation in reduced power state

Flash, SRAM and FlexMemory

  • 512 KB-1 MB flash. Fast access, high reliability with four-level security protection
  • 128 KB of SRAM
  • FlexMemory: 32 bytes-16 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss/corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, 512KB of FlexNVM for extra program code, data or EEPROM backup

Mixed-Signal capability

  • Up to four high-speed 16-bit analog-to-digital converter (ADC) with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering
  • Up to two 12-bit digital-to-analog converter (DAC) for analog waveform generation for audio applications
  • Up to four high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state
  • Up to four programmable gain amplifiers with x64 gain for small amplitude signal conversion
  • Analog voltage reference provides an accurate reference to analog blocks, ADC and DAC, and replaces external voltage references to reduce system cost


  • Arm® Cortex®-M4 core + DSP. 120MHz, single cycle MAC, single instruction multiple data (SIMD) extensions, single precision floating point unit
  • Up to 32-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput
  • Cross bar switch enables concurrent multi-leader bus accesses, increasing bus bandwidth
  • Up to 16 KB of instruction/data cache for optimized bus bandwidth and flash execution performance
  • Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines

Timing and Control

  • Up to four FlexTimers with a total of 20 channels. Hardware dead-time insertion and quadrature decoding for motor control
  • Carrier modulator timer for infrared waveform generation in remote control applications
  • Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block

Human-Machine Interface

  • Hardware touch-sensing interface with up to 16 inputs. Operates in all low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces up to 5 mm thick

Connectivity and Communications

  • USB 2.0 On-The-Go (full and high speed). Device charge detect optimizes charging current/time for portable USB devices enabling longer battery life. Low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external components from 5 volts input
  • Up to six UARTs with IrDA support including one UART with ISO7816 smart card support. Variety of data size, format and transmission/reception settings supported for multiple industrial communication protocols
  • Inter-IC Sound (I2S) serial interface for audio system interfacing
  • Up to two CAN modules for industrial network bridging
  • Up to three DSPI and two I2C

Reliability, Safety and Security

  • Memory protection unit provides memory protection for all leaders on the cross bar switch, increasing software reliability
  • Cyclic redundancy check engine validates memory contents and communication data, increasing system reliability
  • Independent-clocked COP guards against clock skew or code runaway for fail-safe applications such as the IEC 60730 safety standard for household appliances
  • External watchdog monitor drives output pin to safe state external components if watchdog event occurs



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