High-performance, Power-efficient and Cost Sensitive Arm® Cortex®-M0+ MCUs

LPC51U68

Based on the highly energy-efficient Arm® Cortex®-M0+ core and operating at CPU frequencies of up to 150 MHz, NXP’s 32-bit LPC51U68 microcontrollers for embedded applications feature larger memory resources including 96 KB of on-chip SRAM and 256 KB of on-chip flash programming memory with flash accelerator.

NXP’s LPC51U68 MCU features added performance, expanded memory resources and flexible serial port configuration, including USB connectivity, bringing design flexibility, computing performance and integration into today’s demanding IoT and industrial applications. In addition, this MCU is pin compatible with the LPC5411x and LPC5410x MCU families providing scalability options to Arm Cortex-M4 cores.

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LPC51U68 MCU

LPC51U68 MCU Family Block Diagram
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Features

Arm Cortex-M0+ core

  • Running at a frequency of up to 150 MHz
  • Single-cycle multiplier
  • Built-in nested vectored interrupt controller (NVIC)
  • Non-maskable interrupt (NMI) with a selection of sources

On-chip memory

  • 256 KB on-chip flash programming memory with flash accelerator and 256 Byte page write and erase
  • Up to 96 KB total SRAM composed of up to 64 KB main SRAM, plus an additional 32 KB SRAM

ROM API support

  • Flash in-application programming (IAP) and in-system programming (ISP)
  • ROM-based USB drivers (HID, CDC, MSC, DFU)and flash updates via USB
  • Booting from valid user code in flash, USART, SPI, and I2C
  • Legacy, single, and dual image boot

Serial interfaces

  • Eight flexcomm interface serial peripherals. Each can be selected by software to be a USART, SPI, or I2C interface. Two flexcomm interfaces also include an I2S interface, for a total of 2 channel pairs. Each flexcomm interface includes a FIFO that supports USART, SPI, and I2S if supported by that flexcomm interface. A variety of clocking options are available to each flexcomm interface and include a shared fractional rate generator
  • I2C supports fast-mode and fast-mode Plus with data rates of up to 1 Mbit/s and with multiple address recognition and monitor mode. Two sets of true open drain I2C pins also support high-speed Mode (up to 3.4 Mbit/s) as a target
  • USB full-speed device interface with option for crystal-less operation

Digital peripherals

  • DMA controller with 18 channels and 16 programmable triggers, able to access all memories and DMA-capable peripherals
  • Up to 48 general-purpose I/O (GPIO) pins. Most GPIOs have configurable pull-up/pull-down resistors, open-drain mode, and input inverter
  • GPIO registers are located on AHB for fast access
  • Up to four GPIOs can be selected as pin interrupts (PINT), triggered by rising, falling or both input edges
  • Two GPIO grouped interrupts (GINT) enable an interrupt based on a logical (AND/OR) combination of input states
  • CRC engine

Analog peripherals

  • 12-bit ADC with 12 input channels and multiple internal and external trigger inputs and sample rates of up to 5.0 MSamples/sec. The ADC supports two independent conversion sequences
  • Integrated temperature sensor connected to the ADC

Timers

  • Three standard general purpose timers/counters, four of which support up to 4 capture inputs and 4 compare outputs, PWM mode, and external count input. Specific timer events can be selected to generate DMA requests
  • One SCTimer/PWM (SCT) 8 input and 8 output functions (including capture and match). Inputs and outputs can be routed to/from external pins and internally to/from selected peripherals. Internally, the SCT supports 10 captures/matches, 10 events and 10 states
  • 32-bit Real-time clock (RTC) with 1s resolution running in the always-on power domain. A high-resolution timer in the RTC can be used for wake-up from all low power modes including deep power-down with 1ms resolution
  • Multiple-channel, multi-rate 24-bit timer (MRT) for repetitive interrupt generation at up to four programmable fixed rates
  • Windowed watchdog timer (WWDT)
  • Ultra-low power micro-tick Timer, running from the watchdog oscillator, that can be used to wake up the device from most low power modes

Clock generation

  • Internal FRO oscillator, factory trimmed for accuracy, that can optionally be used as a system clock as well as other purposes. This oscillator provides a selectable 48 MHz or 96 MHz output, and a 12 MHz output (divided down from the selected higher frequency) that can optionally be used as a system clock as well as other purposes
  • External clock input for up to 25 MHz
  • Watchdog oscillator with a frequency range of 6 kHz to 1.5 MHz
  • 32 kHz low-power RTC oscillator
  • System PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency external clock. Maybe run from the internal FRO 12 MHz output, the external clock input CLKIN, or the RTC oscillator
  • Clock output function with divider that can reflect many internal clocks
  • Frequency measurement unit for measuring the frequency of an on-chip or off-chip clock signal

Power control

  • Integrated PMU (Power Management Unit) to minimize power consumption
  • Reduced power modes: sleep mode, deep-sleep mode, and deep power-down mode
  • Wake-up from deep-sleep mode on activity on USART, SPI, and I2C peripherals when operating as followers
  • Wake-up from sleep, deep-sleep and deep power-down modes from the RTC alarm
  • The micro-tick Timer can wake-up the device from most reduced power modes by using the watchdog oscillator when no other on-chip resources are running, for ultra-low power wake-up
  • Power-On Reset (POR)
  • Brownout detect

Additional information

  • Single power supply 1.62 V to 3.6 V
  • JTAG boundary scan supported
  • Serial wire debug (SWD) with 4 breakpoints and 2 watchpoints
  • Unique device serial number for identification
  • Operating temperature range of -40 °C to +105 °C
  • Available as LQFP64 and LQFP48 packages

対象アプリケーション

  • High-performance gaming keyboard/mice
  • Industrial grade USB to serial port bridge
  • E-meter
  • Fingerprint recognition
  • USB audio device
  • Sensor hub with USB interface
  • Entry-level mobile POS

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  • シミュレーションとモデル

    IBIS files for LPC51U68

    ZIP改訂 0Oct 21, 2020 08:38:00256.4 KBIBIS-LPC51U6X-FAMILY
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  • プリント基板と回路図

    LPCXpresso51U68 development board (OM40005) schematic (PDF), BOM and Gerber files.

    ZIP改訂 AApr 30, 2018 12:37:00941.0 KBOM40005_DF
    サインインが必要です
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