デザイン・ファイル
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P3041 device is "Not recommended for new designs", please use the replacement families Power Architecture (T208x), Arm Architecture (LS1046, LS2080).
The QorIQ® P3041 processor is an optimized quad-core device that leverages architectural features pioneered in the P4 platform. Built on Power Architecture® technology, the P3041 fits into many of the same applications as the P4 platform processors, yet is designed to offer a more power- and cost-efficient solution.
The P3041 includes P4 platform features such as the three-level cache hierarchy for low latencies, hardware hypervisor for robust virtualization support, data path acceleration architecture (DPAA) for offloading packet handling tasks from the core and the CoreNet® switch fabric which eliminates internal bottlenecks. This enables architectural compatibility from the P3041 to the P4 platform and also to the P5 platform, which uses the same architecture. P3041 is pin-compatible with P4040, P4080, P5010, and P5020.
部品番号: P3041NSE7MMC, P3041NSE7NNC, P3041NSE7PNC, P3041NSN7MMC, P3041NSN7NNC, P3041NSN7PNC, P3041NXE7MMC, P3041NXE7NNC, P3041NXE7PNC, P3041NXN7MMC, P3041NXN7NNC, P3041NXN7PNC.
P2040 | P2041 | P3041 | |
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Cores | 4x e500mc | 4x e500mc | 4x e500mc |
Core Frequency | 667 - 1200 MHz | 1200 - 1500 MHz | 1200 - 1500 MHz |
L2 Cache | - | 128KB/Core | 128KB/Core |
CoreNet Platform Cache | 1MB Frontside | 1MB Frontside | 1MB Frontside |
DDR | 1x 64-bit DDR3/3L | 1x 64-bit DDR3/3L | 1x 64-bit DDR3/3L |
GbE | 5 x 1 GbE | 5 x 1 GbE + 1 x 10 GbE | 5 x 1 GbE + 1 x 10 GbE |
PCIe Gen 2.0 | 3x Gen 2.0 controllers 5.0GHz | 3x Gen 2.0 controllers 5.0GHz | 4x Gen 2.0 controllers 5.0GHz |
USB 2.0 | 2 | 2 | 2 |
sRIO 1.2 | 2 | 2 | 2 |
Other Interfaces | 2 x SATA, 2 x 4-ch DMA engines, 4 x 2-pin UARTs or 2 x 4-pin UARTs | 2 x SATA, 2 x 4-ch DMA engines, 4 x 2-pin UARTs or 2 x 4-pin UARTs | 2 x SATA, 2 x 4-ch DMA engines, 4 x 2-pin UARTs or 2 x 4-pin UARTs |
Accelerators | SEC4.2, PME 2.0 | SEC4.2, PME 2.0 | SEC4.2, PME 2.0 |
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