NXP’s new LPC553x expands the LPC5500 MCU series based on the Arm® Cortex®-M33 technology, featuring precision analog peripherals and motor control peripherals. On chip, it has up to 256KB of Flash memory, 128KB RAM with parity and error correction code (ECC) plus the external Serial/Quad/Octal memory controller and FlexSPI supporting memory expansion with on-the-fly encryption and decryption.
These refreshing details are paired with up to 8 Flexcomm (choice of any 8 serial –I2C/UART/SPI), one dedicated 50MHz SPI, FS USB host/device and CAN FD. The four single ended (or two differential) 16-bit ADC supports two independent conversions simultaneously at 2 MSPS or 3.3 MSPS in 12-bit mode and there are up to 23 ADC input channels. The 4 comparators have up to 5 input pins, three 12-bit DAC, three precision operational amplifiers with settings for programmable gain amp and a precision internal reference voltage.
The motor control subsystem has two flexible pulse width modulation (PWM) modules providing up to 12 PWM outputs, 2 Quadrature encoder/decoder inputs and 2 and/or/invert (AOI) modules for direct feed into peripherals for fast response. In addition, a tightly coupled digital signal processor (DSP) and math accelerator (PowerQuad) support trigonometric and CORDIC functions used in motor control algorithms.
The complex motor control algorithms implemented using the Arm® Cortex®-M33 in combination with PowerQuad outperform algorithms using the common microcontroller software interface standard (CMSIS) DSP library. In addition, an example of how the AOI modules enable a direct connection between the peripherals and the input/output pins completing the motor control subsystem.
Start Your Build Today. Explore the MCUXpresso SDK motor control example for LPCXpresso55S36.
The LPC553x added 8KB LP cache to accelerate access to the on chip Flash. The LP cache is an 8-way, 4-set-associative write-through design. It supports a total of 8KB cache for a 32-bit wide cache datapath and optimized for run power operation. With this cache, the Coremark performance has achieved a >4/MHz (Iterations/s) executing from Flash.
Clarke transformation, which is used to transform values (flux, voltage, current) from the three-phase coordinate system to the two-phase (α-β) orthogonal coordinate system, according to the following equations:
The transformation from two axis orthogonal stationary reference frame to the three phase stator stationary reference frame, is accomplished using the inverse Clarke transformation. The inverse Clarke transformation is expressed by the following equations:
The Park transformation, which transforms values (flux, voltage, current) from the stationary two-phase (α-β) orthogonal coordinate system to the rotating two-phase (d-q) orthogonal coordinate system, according to the following equations:
The Inverse Park transformation, which transforms values (flux, voltage, current) from the rotating two-phase (d-q) orthogonal coordinate system to the stationary two-phase (α-β) coordinate system, according to the following equations:
Reference Doc: GMCLIB User’s Guide Arm® Cortex®-M33F
Using the NXP real time control embedded software motor control and power conversion libraries RTCESL software support for the above motor control algorithms can be implemented using the standard CMSIS DSP library and/or the PowerQuad (PQ) DSP accelerator in the LPC553x.
The PQ performance versus the standard CM33 CMSIS DSP library can be seen below:
To enable fast response to special/time critical events, the LPC553x is equipped with two crossbar switches and AOI modules. Any input pins and peripherals input/outputs can be connected to the two crossbar switches XBARA and XBARB, with combination logic AOI modules. A generic overview as follows:
The 20 inputs at the XBARA (shared with XBARB) allow selections from peripherals or a dedicated pin. Up to 16 outputs from the XBARA can be connected to the input of the AOI, forming the combinational logic. The 4 outputs of the AOI can be also added onto the XBARB, forming the 32 total outputs.
The AOI controller is a peripheral module connecting event input indicators from a variety of device modules and generating event output signals that can be routed to an inter-peripheral crossbar switch or other peripherals. Its programming model is accessed through the standard IPS (Sky Blue) interface.
Each EVENTn output of the AOI module is a combination function of its four dedicated inputs (An, Bn, Cn and Dn). Propagation time through the AOI and any associated inter-peripheral crossbar switch modules is one bus clock cycle.
Here’s an example of motor control implementation using XBAR and GPIO module:
Through the programming of the XBARA and GPIO module, specific response to fault events like overcurrent and voltage can be handled immediately (one bus clock cycle).
In the latest advancement of the LPC5500 MCU series, the LPC553x not only expands, but improves on latest editions in multiple ways. Many new updates to the series are included in the LP553X family, such as increased memory capabilities, additional outputs and quicker input/output response times.
CK joined Philips Semiconductors in 1993 and worked in various roles including quality, applications engineering, product engineering and technical marketing. After Philips, CK joined Freescale in 2012 and rejoined NXP through the Freescale merger. CK is now a Product Manager for Microcontrollers in the Edge Processing Business Line.
