デザイン・ファイル
完全な内訳を受け取ります。 製品の設置面積などについては、 eCad ファイル.
QorIQ® P1020 and P1011 Dual- and Single-Core Communications Processors
- このページでは、新規設計を推奨しない製品に関する情報を掲載しています。
P1020 device is "Not recommended for new designs", please use the replacement families Power Architecture ( T1023), Arm Architecture (LS1023A).
The QorIQ® P1 platform series, which includes the P1020 and P1011 communications processors, offers the value of extensive integration and high power for a wide variety of applications in the networking, telecom, aerospace, defense and industrial markets. The series provides dual-and single-core solutions for the 533 MHz to 800 MHz performance range, along with advanced security and a rich set of interfaces delivered on 45 nm technology for a low-power implementation.
The P1 platform series is perfectly suited for multiservice gateways, Ethernet switch controllers, wireless LAN access points and high-performance general-purpose control processor applications with tight thermal constraints.
The QorIQ P1 series consists of dual- and single-core products that are pin-compatible with QorIQ P2 platform products, offering a five-chip range of cost-effective solutions. Scaling from a single core at 533 MHz (P1011) to a dual core at 1.2 GHz per core (P2020), the two QorIQ platforms deliver an impressive 4.5X aggregate frequency range.
製品詳細
ブロック図
Features
Core Complex
- Dual (P1020) or single (P1011) high-performance Power Architecture® e500 cores, 32 KB L1 cache, up to 800 MHz
- 256 KB L2 cache with ECC, also configurable as SRAM and stashing memory
Networking Elements
- Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSEC)
- Two SGMII interfaces
- Support for IEEE® 1588
Accelerators and Memory Control
- DDR2/3 32-bit memory controller with ECC support
- Integrated security engine
- Protocol support includes SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi
- XOR acceleration
Basic Peripherals and Interconnect
- Four-lane SERDES up to 3.125 GHz multiplexed across controllers
- Two PCI Express® Gen1.0 interface controllers
- Two USB2.0 controllers
- Enhanced Local Bus Controller (eLBC)
- TDM
- eSDHC
- Dual I²C, DUART, PIC, DMA, GPIO
Additional Features
- NXP® Product Longevity Program
- 689-pin 31x31 mm TePBGA package
比較表
| P1011 | P1012 | P1020 | P1021 | |
|---|---|---|---|---|
| Cores | 1 | 1 | 2 | 2 |
| Core Frequency | 533 - 800 MHz | 533 - 800 MHz | 533 - 800 MHz | 533 - 800 MHz |
| L2 Cache | 256KB | 256KB | 256KB | 256KB |
| DDR | 32-bit DDR2/DDR3 | 32-bit DDR2/DDR3 | 32-bit DDR2/DDR3 | 32-bit DDR2/DDR3 |
| GbE | 3 x 10/100/1000 | 3 x 10/100/1000 | 3 x 10/100/1000 | 3 x 10/100/1000 |
| PCIe Gen 1.0 | 2 controllers w/ 4 SERDES | 2 controllers w/ 4 SERDES | 2 controllers w/ 4 SERDES | 2 controllers w/ 4 SERDES |
| USB 2.0 | 2 | 1 | 2 | 2 |
| Memory Card | SD/MMC | SD/MMC | SD/MMC | SD/MMC |
| Other interfaces | SPI, 2xI²C, DUART | SPI, 2xI²C, DUART | SPI, 2xI²C, DUART | SPI, 2xI²C, DUART |
| TDM or QUICC Engine | TDM | QUICC Engine | TDM | QUICC Engine |
| Accelerators | SEC3.3 | SEC3.3 | SEC3.3 | SEC3.3 |
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設計・リソース
ソフトウェア
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4 ソフトウェア・ファイル
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CodeWarrior Development Studio v10 for Power Architecture® Technology (Eclipse) EVAL注目
注: より快適にご利用いただくために、ソフトウェアのダウンロードはデスクトップで行うことを推奨します。