Name: MPC8533E PowerQUICC III Processor
Availability: BackOrder

The MPC8533E PowerQUICC^® III communications processor offers high level of integration and performance for Ethernet-only or PCIe interworking applications, such as enterprise networking and advanced multi-function printer (MFP) and imaging applications.

Includes enhanced peripherals, an integrated security engine, and a wide range of high-speed connectivity options
Supports complex, computationally demanding control plane processing tasks
Comes optimized for power sensitive applications
Provides a flexible SoC platform to accelerate time-to-market
Simplifies board design

Access to the errata document for this device requires an NDA. Contact your local NXP^® Sales Office or NXP Authorized Distributor.

データ・シート

リファレンス・マニュアル

製品詳細

ブロック図

MPC8533E Block Diagram

Features

Embedded e500 core, initial offerings up to 667 MHz, targeting up to 1.0 GHz

Dual dispatch superscalar, 7-stage pipeline design with out-of-order issue and execution
2,240 MIPS at 1.0 GHz (estimated Dhrystone 2.1)
36-bit physical addressing

Enhanced hardware and software debug support

Double-precision embedded scalar and vector floating-point APUs

Memory management unit (MMU)

Double-precision embedded scalar and vector floating-point APUs

Integrated L1/L2 cache

L1 cache—32 KB data and 32 KB instruction cache with line-locking support
L2 cache—256 KB (8-way set associative); 256/128/64/32 KB can be used as SRAM
L1 and L2 hardware coherency
L2 cache and I/O transactions can be stashed into L2 cache regions

Integrated DDR memory controller with full ECC support, offering:

200 MHz clock rate (400 MHz data rate), 64-bit, 2.5V/2.6V I/O, DDR SDRAM
267 MHz clock rate (up to 533 MHz data rate), 64-bit, 1.8V I/O, DDR2 SDRAM

Integrated security engine supporting DES, 3DES, MD-5, SHA-1/2, AES, RSA, RNG, Kasumi F8/F9 and ARC-4 encryption algorithms

Two on-chip Three Speed Ethernet controllers (ETSECs) supporting 10 Mbps, 100 Mbps and 1 Gbps Ethernet/IEEE^{^®} 802.3 networks with MII, RMII, RGMII, and RTBI physical interfaces:

TCP/UDP/IP checksum acceleration
Advanced QoS features

General-purpose input/output (GPIO)

PCI Express high-speed interconnect interfaces, supporting combinations of dual x4 and single x1 PCI Express

On-chip network (OCeaN) switch fabric

PCI interface support

32-bit PCI 2.2 bus controller (up to 66MHz, 3.3V I/O)

Local bus

166 MHz, 32-bit, 3.3V I/O, local bus with memory controller

Integrated four-channel DMA controller

Multiplexed 32-bit address and data operating up to 133 MHz
32-, 16- and 8-bit port sizes controlled by on-chip memory controller

Dual I²C and DUART support

Dual I²C interfaces (controller or target mode)

Programmable interrupt controller (PIC)

IEEE 1149.1 JTAG test access port

1.0V core voltage with 3.3V and 2.5V I/O

783-pin FC-BGA package

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購入/パラメータ

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設計・リソース

デザイン・ファイル

クイック・リファレンス設計・ファイルの種類.

1 設計・ファイル

完全な内訳を受け取ります。 製品の設置面積などについては、 eCad ファイル.

プリント基板と回路図
OrCAD Design Files for the MPC8544 and MPC8533

ZIP改訂 0May 2, 2008 00:00:0025.63 KBMPC8544ORCAD
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ハードウェア

クイック・リファレンスボードタイプ.

2 ハードウェア提供

エミュレータ、プローブ、プログラマ
Power Architecture^® processor ( COP ) Probe Tips for CodeWarrior^® TAP
アクティブ

CWH-CTP-COP-YE
エミュレータ、プローブ、プログラマ
CodeWarrior^® TAP

CW_TAP

トレーニング

7 トレーニング

オンデマンドウェビナー
INTEGRITY Training

3 day投稿者 Green Hills Software Platinum パートナー

オンデマンドウェビナー
PHX-MPC85xx

3 day投稿者 PhoenixMicro Inc. Gold パートナー

オンデマンドウェビナー
Microware OS-9 RTOS insights

5 day投稿者 MicroSys Electronics GmbH Gold パートナー

オンデマンドウェビナー
MULTI Training

2 day投稿者 Green Hills Software Platinum パートナー

オンデマンドウェビナー
PHX-MPC853x

3 day投稿者 PhoenixMicro Inc. Gold パートナー

オンデマンドウェビナー
PHX-MPC8572E

4 day投稿者 PhoenixMicro Inc. Gold パートナー

オンデマンドウェビナー
PHX-MPC854x

3 day投稿者 PhoenixMicro Inc. Gold パートナー

MPC8533E PowerQUICC® III Processor

製品詳細

ブロック図

MPC8533E Block Diagram

Features

Reduce Total Cost of Ownership by getting SoC Platform Development Assistance with NXP Professional Support

アプリケーション

インダストリアル

オートモーティブ

コンスーマ

購入/パラメータ

ドキュメント

絞り込み

アプリケーション・ノート (28)

AN13461: NXP Microcontroller Troubleshooting Checklist - Application Note[AN13461]

SEC 2/3x Descriptor Programmer’s Guide[AN3645]

AN2583, Programming the PowerQUICC® III/PowerQUICC II Pro DDR SDRAM Controller - Application Note[AN2583]

AN4531, Achieving Persistent DRAM on PowerQUICC III and QorIQ Processors - Application Notes[AN4531]

Verification of the IEEE 1588 Interface[AN4326]

SerDes Reference Clock Interfacing and HSSI Measurements Recommendations[AN4311]

AN3830, Hardware Debugging Using the CodeWarrior® ™ IDE - Application Notes[AN3830]

MPC8533E PowerQUICC®™ III Bring-up Guide[AN3641]

DDR Interleaving for PowerQUICC and QorIQ Processors[AN3939]

Understanding Device Tree Files in Multicore Hypervisor/LWE Implementations[AN3649]

AN4064, Utilizing 36-Bit Physical Addressing in U-Boot and Linux - Application Notes[AN4064]

Understanding SYSCLK Jitter[AN4056]

Communicating via HDLC over a TDM Interface with a QUICC Engine™ UCC[AN4026]

PowerQUICC™ HDLC Support and Example Code[AN3966]

The SystemID Format for Power Architecture™ Development Systems[AN3638]

Booting from Serial RapidIO™/PCI Express™ on PowerQUICC™ III and QorIQ™ P1xx/P2xx[AN3646]

PowerQUICC®™ UPM Configuration[AN2810]

Implementing SGMII Interfaces on the PowerQUICC™ III[AN3869]

Utilizing Extra FC Credits for PCI Express Inbound Posted Memory Write Transactions in PowerQUICC III™ Devices[AN3781]

Determining the I2C Frequency Divider Ratio for SCL[AN2919]

PowerQUICC® DDR2 SDRAM Controller Register Setting Considerations[AN3369]

PowerQUICC™ Data Cache Coherency[AN3544]

Coherency and Synchronization Requirements for PowerQUICC™ III[AN3441]

Error Correction and Error Handling on PowerQUICC (TM) III Processors[AN3532]

AN3445, Migrating from e300- to e500-Based Integrated Devices - Application Notes[AN3445]

AN3531, Migrating from e600- to e500-Based Integrated Devices - Application Notes[AN3531]

Hardware and Layout Design Considerations for DDR2 SDRAM Memory Interfaces[AN2910]

Migration from MPC8540 or MPC8541E to MPC8548E[AN2807]

アプリケーション・ノート・ソフトウェア (4)

Software to accompany application note AN3966[AN3966SW]

Challenges in Testing for Power Rail Shorts with New Technologies[AN3372]

Simplifying Board Bringup: Porting a CodeWarrior® Initialization File to Your System[AN3366]

AN2810 Supporting Files[AN2810SW]

サポート情報 (2)

FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP® Cryptographic Accelerators - White Paper[FSLNISTCAVP]

MPC8533 Family Customer Export Control Information[MPC8533EFAMPECI]

データ・シート (1)

MPC8533EEC, MPC8533E PowerQUICC® III Integrated Processor Hardware Specifications - Data Sheet[MPC8533EEC]注目

パッケージ情報 (2)

Flip Chip Plastic Ball Grid Array (FC-PBGA) Presentation[FC-PBGAPRES]

MPC8544E and MPC8533E Thermal Simulation Report and Models[MPC8544FLOTHERM]

ファクト・シート (2)

MPC8533E Application Summary[MPC8533EAS]

MPC8533E Fact Sheet[MPC8533EFS]注目

ホワイト・ペーパ (4)

Understanding Cryptographic Performance[CRYPTOWP]

Comparison of DDRx and SDRAM[DDRSDRAMWP]

How to Interface the PowerQUICC II Pro and PowerQUICC III Local Bus Controller to NAND Flash[NANDFLASHWP]

Understanding Public-Key Performance[PUBLICKEYPERFWP]

リファレンス・マニュアル (5)

EREF_RM, EREF: A Programmer's Reference Manual for Freescale Power Architecture Processors - Reference Manual[EREF_RM]

E500CORER, Errata to PowerPC ™ e500 Core Family - Reference Manual[E500CORERMAD]

Errata to MPC8533E PowerQUICC®™ III Integrated Host Processor Family Reference Manual, Rev. 1[MPC8533ERMAD]

PowerPC ™ e500 Core Family - Reference Manual[E500CORERM]

MPC8533E Reference Manual[MPC8533ERM]注目

製品概要 (1)

MPC8533E Product Brief[MPC8533EPB]注目

MPC8533E Fact Sheet注目

MPC8533E Product Brief注目

MPC8533E Reference Manual 注目

MPC8533EEC, MPC8533E PowerQUICC® III Integrated Processor Hardware Specifications - Data Sheet注目

設計・リソース

デザイン・ファイル

MPC8533E PowerQUICC^® III Processor

AN2583, Programming the PowerQUICC^® III/PowerQUICC II Pro DDR SDRAM Controller - Application Note[AN2583]

AN3830, Hardware Debugging Using the CodeWarrior^® ™ IDE - Application Notes[AN3830]

MPC8533E PowerQUICC^®™ III Bring-up Guide[AN3641]

PowerQUICC^®™ UPM Configuration[AN2810]

PowerQUICC^® DDR2 SDRAM Controller Register Setting Considerations[AN3369]

Simplifying Board Bringup: Porting a CodeWarrior^® Initialization File to Your System[AN3366]

FSLNISTCAVP, NIST Crypto Algorithm Validation Program Certifications for NXP^® Cryptographic Accelerators - White Paper[FSLNISTCAVP]

MPC8533EEC, MPC8533E PowerQUICC^® III Integrated Processor Hardware Specifications - Data Sheet[MPC8533EEC]注目

Errata to MPC8533E PowerQUICC^®™ III Integrated Host Processor Family Reference Manual, Rev. 1[MPC8533ERMAD]

MPC8533EEC, MPC8533E PowerQUICC^® III Integrated Processor Hardware Specifications - Data Sheet注目