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シンボルおよびフットプリント
PCA9704PW-TSSOP16-CAD Symbol and PCB Footprint – BXL File
18 V Tolerant SPI 8-Bit GPI with Maskable INT
The PCA9704 is a low power 18 V tolerant SPI General Purpose Input (GPI) shift register designed to monitor the status of switch inputs. It generates an interrupt when one or more of the switch inputs change state but allows selected inputs to not generate interrupts using the interrupt masking feature. The input level is recognized as a HIGH when it is greater than 0.8 x VDD and as a LOW when it is less than 0.55 x VDD (minimum LOW threshold of 2.5 V at 5 V node). The PCA9704 can monitor up to 8 switch inputs.
The falling edge of the CS pin samples the input port status and clears the interrupt. When CS is LOW, the rising edge of the SCLK loads the shift register and shifts the value out of the shift register. The serial input is sampled on the falling edge of SCLK. The contents of the shift register are loaded into the interrupt mask register of the device on the rising edge of CS.
Each of the input ports has an 18 V breakdown ESD protection circuit, which dumps the ESD/overvoltage current to ground. When used with a series resistor (minimum 100 kΩ), the input can connect to a 12 V battery and support a double battery, reverse battery, 27 V jump start and 40 V load dump conditions in automotive applications. Higher voltages can be tolerated on the inputs depending on the series resistor used to limit the input current.
The INT_EN pin is used to both enable the GPI pins and to enable the INT output pin to minimize battery drain in a cyclically supplied pull-up or pull-down applications. The SDIN pull-down prevents floating nodes when the device is used in daisy-chain applications.
With both the high breakdown voltage and high ESD, this device is useful for both automotive (AEC-Q100 compliance available) and mobile applications.
Outline 3d SOT403-1
製品詳細
Features
Key Features
- 8 general purpose input ports
- 18 V tolerant input ports with 100 kΩ external series resistor
- Input LOW threshold 0.55 x VDD with minimum of 2.5 V at VDD= 4.5 V
- Open-drain interrupt output
- Interrupt enable pin (INT_EN) disables GPI pins and interrupt output
- Interrupt-masking feature allows no interrupt generation from selected inputs
- VDD range: 4.5 V to 5.5 V
- IDD is very low 2.5 µA maximum
- SPI serial interface with speeds up to 5 MHz
- SPI supports daisy-chain connection for large switch numbers
- AEC-Q100 compliance available
- ESD protection exceeds 5 kV HBM per JESD22-A114 and 1000 V CDM per JESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
- Operating temperature range: -40 °C to +125 °C
- Offered in TSSOP16 package
部品番号： PCA9704PW.
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ドキュメント
クイック・リファレンス ドキュメンテーションの種類.