Presented by
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Marketing Director, NXP Semiconductors
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Key-Account Manager, F&S
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English
As AI workloads continue to evolve beyond simple TOPS measurements, system architects must consider the full balance of compute, memory, power, thermal design, and software integration to build effective edge AI solutions. This training explores how NXP i.MX 937, i.MX 943, and i.MX 95 applications processors can be paired with Ara240 discrete NPU acceleration to support vision, language, and multimodal AI workloads at the edge.
Through practical examples, attendees will learn how different memory configurations and modular accelerator architectures impact performance, scalability, and efficiency. The session will provide guidance for selecting the right architecture and combining host processing, integrated NPUs, and external AI acceleration to create production-ready edge AI systems.
Not sure you can join? You should still register! Slides and a recording of the session will be available after the webinar.
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