Hot Swappable I²C-Bus and SMBus Bus Buffer




PCA9511A Block Diagram

PCA9511A Block Diagram

Block diagram: PCA9511AD, PCA9511ADP, PCA9513AD, PCA9513ADP, PCA9514AD, PCA9514ADP


Key Features

  • Bidirectional buffer for SDA and SCL lines increases fan out and prevents SDA and SCL corruption during live board insertion and removal from multipoint backplane systems
  • Compatible with I2C-bus Standard-mode, I2C-bus Fast-mode, and SMBus standards
  • Built-in ΔV/Δt rise time accelerators on all SDA and SCL lines (0.6 V threshold) requires the bus pull-up voltage and supply voltage (VCC) to be the same
  • Active HIGH ENABLE input
  • Active HIGH READY open-drain output
  • High-impedance SDA and SCL pins for VCC = 0 V
  • 1 V precharge on all SDA and SCL lines
  • Supporting clock stretching and multiple controller arbitration/synchronization
  • Operating power supply voltage range: 2.7 V to 5.5 V
  • 0 Hz to 400 kHz clock frequency
  • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
  • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

Packages Offered

  • SO8, TSSOP8 (MSOP8)

Product Longevity Program

  • This product is included in NXP Product Longevity Program ensuring a stable supply of products for your embedded designs. The PCA9511ADP is included in the 15-year program

部品番号: PCA9511AD, PCA9511ADP.


クイック・リファレンス ドキュメンテーションの種類.

1-5 の 14 ドキュメント



1 設計・ファイル


1 ハードウェア提供


2 エンジニアリング・サービス

本製品をサポートするパートナーの一覧は、 パートナーマーケットプレイス.