NXPリファレンスデザイン・ライブラリ
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About This Training
Discover how to optimize your design by leveraging the dual-core functionality of the LPC55S69 MCU, The primary CPU is intended for data-intensive tasks. The Arm-v8 implementation with TrustZone features gives the developer a secure hardware-management for sensitive controllers. The secondary CPU is an offloader for various tasks, giving the application designer greater control and performance for the primary CPU.
What You Will Learn
- Discover dual-core functionality of the LPC55S69 MCU
- Learn how to optimize the hardware usage from this MCU
Additional Resources
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