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sct_001.h
Go to the documentation of this file.
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/*
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* @brief State Configurable Timer registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __SCT_001_H_
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#define __SCT_001_H_
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#include "sys_config.h"
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#include "
cmsis.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define CONFIG_SCT_nEV (16)
/* Number of events */
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#define CONFIG_SCT_nRG (16)
/* Number of match/compare registers */
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#define CONFIG_SCT_nOU (16)
/* Number of outputs */
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typedef
struct
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{
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__IO
uint32_t
CONFIG
;
/* Configuration Register */
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union
{
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__IO
uint32_t
CTRL_U
;
/* Control Register */
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struct
{
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__IO uint16_t
CTRL_L
;
/* low control register */
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__IO uint16_t
CTRL_H
;
/* high control register */
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};
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};
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__IO uint16_t
LIMIT_L
;
/* limit register for counter L */
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__IO uint16_t
LIMIT_H
;
/* limit register for counter H */
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__IO uint16_t
HALT_L
;
/* halt register for counter L */
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__IO uint16_t
HALT_H
;
/* halt register for counter H */
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__IO uint16_t
STOP_L
;
/* stop register for counter L */
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__IO uint16_t
STOP_H
;
/* stop register for counter H */
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__IO uint16_t
START_L
;
/* start register for counter L */
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__IO uint16_t
START_H
;
/* start register for counter H */
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uint32_t
RESERVED1[10];
/* 0x03C reserved */
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union
{
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__IO
uint32_t
COUNT_U
;
/* counter register */
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struct
{
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__IO uint16_t
COUNT_L
;
/* counter register for counter L */
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__IO uint16_t
COUNT_H
;
/* counter register for counter H */
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};
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};
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__IO uint16_t
STATE_L
;
/* state register for counter L */
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__IO uint16_t
STATE_H
;
/* state register for counter H */
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__I
uint32_t
INPUT
;
/* input register */
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__IO uint16_t
REGMODE_L
;
/* match - capture registers mode register L */
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__IO uint16_t
REGMODE_H
;
/* match - capture registers mode register H */
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__IO
uint32_t
OUTPUT
;
/* output register */
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__IO
uint32_t
OUTPUTDIRCTRL
;
/* output counter direction Control Register */
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__IO
uint32_t
RES
;
/* conflict resolution register */
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__IO
uint32_t
DMA0REQUEST
;
/* DMA0 Request Register */
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__IO
uint32_t
DMA1REQUEST
;
/* DMA1 Request Register */
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uint32_t
RESERVED2[35];
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__IO
uint32_t
EVEN
;
/* event enable register */
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__IO
uint32_t
EVFLAG
;
/* event flag register */
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__IO
uint32_t
CONEN
;
/* conflict enable register */
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__IO
uint32_t
CONFLAG
;
/* conflict flag register */
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union
{
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__IO
union
{
/* ... Match / Capture value */
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uint32_t
U
;
/* SCTMATCH[i].U Unified 32-bit register */
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struct
{
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uint16_t
L
;
/* SCTMATCH[i].L Access to L value */
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uint16_t
H
;
/* SCTMATCH[i].H Access to H value */
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};
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} MATCH[
CONFIG_SCT_nRG
];
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__I
union
{
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uint32_t
U;
/* SCTCAP[i].U Unified 32-bit register */
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struct
{
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uint16_t L;
/* SCTCAP[i].L Access to H value */
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uint16_t H;
/* SCTCAP[i].H Access to H value */
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};
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} CAP[
CONFIG_SCT_nRG
];
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};
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uint32_t
RESERVED3[32-
CONFIG_SCT_nRG
];
/* ...-0x17C reserved */
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union
{
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__IO uint16_t MATCH_L[
CONFIG_SCT_nRG
];
/* 0x180-... Match Value L counter */
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__I uint16_t CAP_L[
CONFIG_SCT_nRG
];
/* 0x180-... Capture Value L counter */
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};
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uint16_t RESERVED4[32-
CONFIG_SCT_nRG
];
/* ...-0x1BE reserved */
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union
{
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__IO uint16_t MATCH_H[
CONFIG_SCT_nRG
];
/* 0x1C0-... Match Value H counter */
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__I uint16_t CAP_H[
CONFIG_SCT_nRG
];
/* 0x1C0-... Capture Value H counter */
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};
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uint16_t RESERVED5[32-
CONFIG_SCT_nRG
];
/* ...-0x1FE reserved */
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union
{
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__IO
union
{
/* 0x200-... Match Reload / Capture Control value */
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uint32_t
U;
/* SCTMATCHREL[i].U Unified 32-bit register */
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struct
{
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uint16_t L;
/* SCTMATCHREL[i].L Access to L value */
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uint16_t H;
/* SCTMATCHREL[i].H Access to H value */
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};
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} MATCHREL[
CONFIG_SCT_nRG
];
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__IO
union
{
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uint32_t
U;
/* SCTCAPCTRL[i].U Unified 32-bit register */
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struct
{
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uint16_t L;
/* SCTCAPCTRL[i].L Access to H value */
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uint16_t H;
/* SCTCAPCTRL[i].H Access to H value */
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};
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} CAPCTRL[
CONFIG_SCT_nRG
];
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};
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uint32_t
RESERVED6[32-
CONFIG_SCT_nRG
];
/* ...-0x27C reserved */
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union
{
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__IO uint16_t MATCHREL_L[
CONFIG_SCT_nRG
];
/* 0x280-... Match Reload value L counter */
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__IO uint16_t CAPCTRL_L[
CONFIG_SCT_nRG
];
/* 0x280-... Capture Control value L counter */
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};
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uint16_t RESERVED7[32-
CONFIG_SCT_nRG
];
/* ...-0x2BE reserved */
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union
{
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__IO uint16_t MATCHREL_H[
CONFIG_SCT_nRG
];
/* 0x2C0-... Match Reload value H counter */
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__IO uint16_t CAPCTRL_H[
CONFIG_SCT_nRG
];
/* 0x2C0-... Capture Control value H counter */
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};
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uint16_t RESERVED8[32-
CONFIG_SCT_nRG
];
/* ...-0x2FE reserved */
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__IO
struct
{
/* 0x300-0x3FC SCTEVENT[i].STATE / SCTEVENT[i].CTRL*/
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uint32_t
STATE
;
/* Event State Register */
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uint32_t
CTRL
;
/* Event Control Register */
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} EVENT[
CONFIG_SCT_nEV
];
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uint32_t
RESERVED9[128-2*
CONFIG_SCT_nEV
];
/* ...-0x4FC reserved */
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__IO
struct
{
/* 0x500-0x57C SCTOUT[i].SET / SCTOUT[i].CLR */
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uint32_t
SET
;
/* Output n Set Register */
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uint32_t
CLR
;
/* Output n Clear Register */
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} OUT[
CONFIG_SCT_nOU
];
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uint32_t
RESERVED10[191-2*
CONFIG_SCT_nOU
];
/* ...-0x7F8 reserved */
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__I
uint32_t
MODULECONTENT
;
/* 0x7FC Module Content */
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}
IP_SCT_001_Type
;
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __SCT_001_H_ */
software
lpc_core
lpc_ip
sct_001.h
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