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IP_CCAN_001_Type Struct Reference

CCAN Controller Area Network register block structure. More...

#include "ccan_001.h"

Data Fields

__IO uint32_t CNTL
 
__IO uint32_t STAT
 
__I uint32_t EC
 
__IO uint32_t BT
 
__I uint32_t INT
 
__IO uint32_t TEST
 
__IO uint32_t BRPE
 
__I uint32_t RESERVED0
 
__IO uint32_t IF1_CMDREQ
 
union {
   __IO uint32_t   IF1_CMDMSK_R
 
   __IO uint32_t   IF1_CMDMSK_W
 
}; 
 
__IO uint32_t IF1_MSK1
 
__IO uint32_t IF1_MSK2
 
__IO uint32_t IF1_ARB1
 
__IO uint32_t IF1_ARB2
 
__IO uint32_t IF1_MCTRL
 
__IO uint32_t IF1_DA1
 
__IO uint32_t IF1_DA2
 
__IO uint32_t IF1_DB1
 
__IO uint32_t IF1_DB2
 
__I uint32_t RESERVED1 [13]
 
__IO uint32_t IF2_CMDREQ
 
union {
   __IO uint32_t   IF2_CMDMSK_R
 
   __IO uint32_t   IF2_CMDMSK_W
 
}; 
 
__IO uint32_t IF2_MSK1
 
__IO uint32_t IF2_MSK2
 
__IO uint32_t IF2_ARB1
 
__IO uint32_t IF2_ARB2
 
__IO uint32_t IF2_MCTRL
 
__IO uint32_t IF2_DA1
 
__IO uint32_t IF2_DA2
 
__IO uint32_t IF2_DB1
 
__IO uint32_t IF2_DB2
 
__I uint32_t RESERVED2 [21]
 
__I uint32_t TXREQ1
 
__I uint32_t TXREQ2
 
__I uint32_t RESERVED3 [6]
 
__I uint32_t ND1
 
__I uint32_t ND2
 
__I uint32_t RESERVED4 [6]
 
__I uint32_t IR1
 
__I uint32_t IR2
 
__I uint32_t RESERVED5 [6]
 
__I uint32_t MSGV1
 
__I uint32_t MSGV2
 
__I uint32_t RESERVED6 [6]
 
__IO uint32_t CLKDIV
 

Detailed Description

CCAN Controller Area Network register block structure.

Definition at line 50 of file ccan_001.h.

Field Documentation

union { ... }
union { ... }
__IO uint32_t BRPE

Baud rate prescaler extension register

Definition at line 57 of file ccan_001.h.

__IO uint32_t BT

Bit timing register

Definition at line 54 of file ccan_001.h.

__IO uint32_t CLKDIV

CAN clock divider register

Definition at line 103 of file ccan_001.h.

__IO uint32_t CNTL

< C_CAN Structure CAN control

Definition at line 51 of file ccan_001.h.

__I uint32_t EC

Error counter

Definition at line 53 of file ccan_001.h.

__IO uint32_t IF1_ARB1

Message interface 1 arbitration 1

Definition at line 67 of file ccan_001.h.

__IO uint32_t IF1_ARB2

Message interface 1 arbitration 2

Definition at line 68 of file ccan_001.h.

__IO uint32_t IF1_CMDMSK_R

Message interface command mask (read direction)

Definition at line 61 of file ccan_001.h.

__IO uint32_t IF1_CMDMSK_W

Message interface command mask (write direction)

Definition at line 62 of file ccan_001.h.

__IO uint32_t IF1_CMDREQ

Message interface command request

Definition at line 59 of file ccan_001.h.

__IO uint32_t IF1_DA1

Message interface data A1

Definition at line 70 of file ccan_001.h.

__IO uint32_t IF1_DA2

Message interface 1 data A2

Definition at line 71 of file ccan_001.h.

__IO uint32_t IF1_DB1

Message interface 1 data B1

Definition at line 72 of file ccan_001.h.

__IO uint32_t IF1_DB2

Message interface 1 data B2

Definition at line 73 of file ccan_001.h.

__IO uint32_t IF1_MCTRL

Message interface 1 message control

Definition at line 69 of file ccan_001.h.

__IO uint32_t IF1_MSK1

Message interface mask 1

Definition at line 65 of file ccan_001.h.

__IO uint32_t IF1_MSK2

Message interface 1 mask 2

Definition at line 66 of file ccan_001.h.

__IO uint32_t IF2_ARB1

Message interface 1 arbitration 1

Definition at line 83 of file ccan_001.h.

__IO uint32_t IF2_ARB2

Message interface 1 arbitration 2

Definition at line 84 of file ccan_001.h.

__IO uint32_t IF2_CMDMSK_R

Message interface command mask (read direction)

Definition at line 77 of file ccan_001.h.

__IO uint32_t IF2_CMDMSK_W

Message interface command mask (write direction)

Definition at line 78 of file ccan_001.h.

__IO uint32_t IF2_CMDREQ

Message interface command request

Definition at line 75 of file ccan_001.h.

__IO uint32_t IF2_DA1

Message interface data A1

Definition at line 86 of file ccan_001.h.

__IO uint32_t IF2_DA2

Message interface 1 data A2

Definition at line 87 of file ccan_001.h.

__IO uint32_t IF2_DB1

Message interface 1 data B1

Definition at line 88 of file ccan_001.h.

__IO uint32_t IF2_DB2

Message interface 1 data B2

Definition at line 89 of file ccan_001.h.

__IO uint32_t IF2_MCTRL

Message interface 1 message control

Definition at line 85 of file ccan_001.h.

__IO uint32_t IF2_MSK1

Message interface mask 1

Definition at line 81 of file ccan_001.h.

__IO uint32_t IF2_MSK2

Message interface 1 mask 2

Definition at line 82 of file ccan_001.h.

Interrupt register

Definition at line 55 of file ccan_001.h.

__I uint32_t IR1

Interrupt pending 1

Definition at line 97 of file ccan_001.h.

__I uint32_t IR2

Interrupt pending 2

Definition at line 98 of file ccan_001.h.

__I uint32_t MSGV1

Message valid 1

Definition at line 100 of file ccan_001.h.

__I uint32_t MSGV2

Message valid 2

Definition at line 101 of file ccan_001.h.

__I uint32_t ND1

New data 1

Definition at line 94 of file ccan_001.h.

__I uint32_t ND2

New data 2

Definition at line 95 of file ccan_001.h.

__I uint32_t RESERVED0

Definition at line 58 of file ccan_001.h.

__I uint32_t RESERVED1[13]

Definition at line 74 of file ccan_001.h.

__I uint32_t RESERVED2[21]

Definition at line 90 of file ccan_001.h.

__I uint32_t RESERVED3[6]

Definition at line 93 of file ccan_001.h.

__I uint32_t RESERVED4[6]

Definition at line 96 of file ccan_001.h.

__I uint32_t RESERVED5[6]

Definition at line 99 of file ccan_001.h.

__I uint32_t RESERVED6[6]

Definition at line 102 of file ccan_001.h.

__IO uint32_t STAT

Status register

Definition at line 52 of file ccan_001.h.

__IO uint32_t TEST

Test register

Definition at line 56 of file ccan_001.h.

__I uint32_t TXREQ1

Transmission request 1

Definition at line 91 of file ccan_001.h.

__I uint32_t TXREQ2

Transmission request 2

Definition at line 92 of file ccan_001.h.


The documentation for this struct was generated from the following file: