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ssp_18xx_43xx.h
Go to the documentation of this file.
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/*
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* @brief LPC18xx/43xx SSP driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __SSP_18XX_43XX_H_
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#define __SSP_18XX_43XX_H_
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#include "
chip.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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/*
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* @brief SSP clock format
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*/
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typedef
enum
SSP_ClockFormat
{
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SSP_CLOCK_CPHA0_CPOL0
= (0 << 6),
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SSP_CLOCK_CPHA0_CPOL1
= (1u << 6),
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SSP_CLOCK_CPHA1_CPOL0
= (2u << 6),
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SSP_CLOCK_CPHA1_CPOL1
= (3u << 6),
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SSP_CLOCK_MODE0
=
SSP_CLOCK_CPHA0_CPOL0
,
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SSP_CLOCK_MODE1
=
SSP_CLOCK_CPHA1_CPOL0
,
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SSP_CLOCK_MODE2
=
SSP_CLOCK_CPHA0_CPOL1
,
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SSP_CLOCK_MODE3
=
SSP_CLOCK_CPHA1_CPOL1
,
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}
SSP_ClockFormat
;
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/*
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* @brief SSP frame format
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*/
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typedef
enum
SSP_FrameFormat
{
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SSP_FRAMEFORMAT_SPI
= (0 << 4),
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SSP_FRAMEFORMAT_TI
= (1u << 4),
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SSP_FRAMEFORMAT_MICROWIRE
= (2u << 4),
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}
SSP_FrameFormat
;
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/*
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* @brief Number of bits per frame
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*/
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typedef
enum
SSP_Bits
{
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SSP_BITS_4
= (3u << 0),
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SSP_BITS_5
= (4u << 0),
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SSP_BITS_6
= (5u << 0),
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SSP_BITS_7
= (6u << 0),
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SSP_BITS_8
= (7u << 0),
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SSP_BITS_9
= (8u << 0),
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SSP_BITS_10
= (9u << 0),
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SSP_BITS_11
= (10u << 0),
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SSP_BITS_12
= (11u << 0),
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SSP_BITS_13
= (12u << 0),
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SSP_BITS_14
= (13u << 0),
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SSP_BITS_15
= (14u << 0),
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SSP_BITS_16
= (15u << 0),
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}
SSP_Bits
;
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/*
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* @brief SSP config format
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*/
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typedef
struct
SSP_ConfigFormat
{
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SSP_Bits
bits
;
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SSP_ClockFormat
clockFormat
;
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SSP_FrameFormat
frameFormat
;
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}
SSP_ConfigFormat
;
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/*
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* @brief SSP mode
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*/
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typedef
enum
SSP_Mode
{
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SSP_MODE_MASTER
= (0 << 2),
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SSP_MODE_SLAVE
= (1u << 2),
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}
SSP_Mode
;
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/*
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* @brief SPI address
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*/
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typedef
struct
{
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uint8_t
port
;
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uint8_t
pin
;
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}
SPI_Address_t
;
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/*
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* @brief SSP data setup structure
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*/
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typedef
struct
{
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void
*
tx_data
;
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uint32_t
tx_cnt
;
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void
*
rx_data
;
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uint32_t
rx_cnt
;
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uint32_t
length
;
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}
Chip_SSP_DATA_SETUP_Type
;
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#define SSP_CPHA_FIRST SSP_CR0_CPHA_FIRST
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#define SSP_CPHA_SECOND SSP_CR0_CPHA_SECOND
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/* There's no bug here!!!
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* - If bit[6] in SSPnCR0 is 0: SSP controller maintains the bus clock low between frames.
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* That means the active clock is in HI state.
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* - If bit[6] in SSPnCR0 is 1 (SSP_CR0_CPOL_HI): SSP controller maintains the bus clock
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* high between frames. That means the active clock is in LO state.
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*/
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#define SSP_CPOL_HI SSP_CR0_CPOL_LO
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#define SSP_CPOL_LO SSP_CR0_CPOL_HI
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#define SSP_SLAVE_MODE SSP_CR1_SLAVE_EN
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#define SSP_MASTER_MODE SSP_CR1_MASTER_EN
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STATIC
INLINE
FlagStatus
Chip_SSP_GetStatus
(
LPC_SSP_Type
*pSSP,
SSP_Status_Type
Stat
)
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{
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return
IP_SSP_GetStatus
(pSSP, Stat);
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}
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STATIC
INLINE
void
Chip_SSP_Cmd
(
LPC_SSP_Type
*pSSP,
FunctionalState
NewState)
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{
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IP_SSP_Cmd
(pSSP, NewState);
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}
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STATIC
INLINE
void
Chip_SSP_DeInit
(
LPC_SSP_Type
*pSSP)
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{
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IP_SSP_DeInit
(pSSP);
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}
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STATIC
INLINE
void
Chip_SSP_LoopBackCmd
(
LPC_SSP_Type
*pSSP,
FunctionalState
NewState)
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{
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IP_SSP_LoopBackCmd
(pSSP, NewState);
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}
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void
Chip_SSP_Int_FlushData
(
LPC_SSP_Type
*pSSP);
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Status
Chip_SSP_Int_RWFrames8Bits
(
LPC_SSP_Type
*pSSP,
Chip_SSP_DATA_SETUP_Type
*
xf_setup
);
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Status
Chip_SSP_Int_RWFrames16Bits
(
LPC_SSP_Type
*pSSP,
Chip_SSP_DATA_SETUP_Type
*
xf_setup
);
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uint32_t
Chip_SSP_RWFrames_Blocking
(
LPC_SSP_Type
*pSSP,
Chip_SSP_DATA_SETUP_Type
*
xf_setup
);
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uint32_t
Chip_SSP_WriteFrames_Blocking
(
LPC_SSP_Type
*pSSP, uint8_t *buffer,
uint32_t
buffer_len);
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uint32_t
Chip_SSP_ReadFrames_Blocking
(
LPC_SSP_Type
*pSSP, uint8_t *buffer,
uint32_t
buffer_len);
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void
Chip_SSP_Init
(
LPC_SSP_Type
*pSSP);
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void
Chip_SSP_Set_Master
(
LPC_SSP_Type
*pSSP,
bool
master);
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void
Chip_SSP_Set_BitRate
(
LPC_SSP_Type
*pSSP,
uint32_t
bit_rate);
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void
Chip_SSP_Set_Format
(
LPC_SSP_Type
*pSSP,
SSP_ConfigFormat
*format);
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void
Chip_SSP_Int_Cmd
(
LPC_SSP_Type
*pSSP,
FunctionalState
NewState);
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void
Chip_SSP_DMA_Cmd
(
LPC_SSP_Type
*pSSP,
FunctionalState
NewState);
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __SSP_18XX_43XX_H_ */
software
lpc_core
lpc_chip
chip_18xx_43xx
ssp_18xx_43xx.h
Generated on Fri Nov 16 2012 13:36:42 for LPCOpen Platform by
1.8.2