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ssp_001.h
Go to the documentation of this file.
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/*
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* @brief SSP Registers and control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __SSP_001_H_
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#define __SSP_001_H_
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#include "sys_config.h"
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#include "
cmsis.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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typedef
struct
{
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__IO
uint32_t
CR0
;
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__IO
uint32_t
CR1
;
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__IO
uint32_t
DR
;
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__I
uint32_t
SR
;
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__IO
uint32_t
CPSR
;
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__IO
uint32_t
IMSC
;
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__I
uint32_t
RIS
;
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__I
uint32_t
MIS
;
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__O
uint32_t
ICR
;
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#if !defined(CHIP_LPC111X_CXX) && !defined(CHIP_LPC11UXX)
/* no DMA on LPC11xx or LPC11Uxx */
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__IO
uint32_t
DMACR
;
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#endif
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}
IP_SSP_001_Type
;
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#define SSP_CR0_DSS(n) ((uint32_t) ((n) & 0xF))
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#define SSP_CR0_FRF_SPI ((uint32_t) (0 << 4))
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#define SSP_CR0_FRF_TI ((uint32_t) (1 << 4))
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#define SSP_CR0_FRF_MICROWIRE ((uint32_t) (2 << 4))
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#define SSP_CR0_CPOL_LO ((uint32_t) (0))
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#define SSP_CR0_CPOL_HI ((uint32_t) (1 << 6))
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#define SSP_CR0_CPHA_FIRST ((uint32_t) (0))
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#define SSP_CR0_CPHA_SECOND ((uint32_t) (1 << 7))
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#define SSP_CR0_SCR(n) ((uint32_t) ((n & 0xFF) << 8))
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#define SSP_CR0_BITMASK ((uint32_t) (0xFFFF))
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#define SSP_CR0_BITMASK ((uint32_t) (0xFFFF))
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#define SSP_CR0_SCR(n) ((uint32_t) ((n & 0xFF) << 8))
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#define SSP_CR1_LBM_EN ((uint32_t) (1 << 0))
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#define SSP_CR1_SSP_EN ((uint32_t) (1 << 1))
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#define SSP_CR1_SLAVE_EN ((uint32_t) (1 << 2))
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#define SSP_CR1_MASTER_EN ((uint32_t) (0))
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#define SSP_CR1_SO_DISABLE ((uint32_t) (1 << 3))
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#define SSP_CR1_BITMASK ((uint32_t) (0x0F))
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#define SSP_CPSR_BITMASK ((uint32_t) (0xFF))
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#define SSP_DR_BITMASK(n) ((n) & 0xFFFF)
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#define SSP_SR_BITMASK ((uint32_t) (0x1F))
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#define SSP_ICR_BITMASK ((uint32_t) (0x03))
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typedef
enum
{
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SSP_STAT_TFE
= ((
uint32_t
)(1 << 0)),
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SSP_STAT_TNF
= ((
uint32_t
)(1 << 1)),
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SSP_STAT_RNE
= ((
uint32_t
)(1 << 2)),
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SSP_STAT_RFF
= ((
uint32_t
)(1 << 3)),
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SSP_STAT_BSY
= ((
uint32_t
)(1 << 4)),
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}
SSP_Status_Type
;
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typedef
enum
{
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SSP_RORIM
= ((
uint32_t
)(1 << 0)),
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SSP_RTIM
= ((
uint32_t
)(1 << 1)),
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SSP_RXIM
= ((
uint32_t
)(1 << 2)),
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SSP_TXIM
= ((
uint32_t
)(1 << 3)),
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SSP_INT_MASK_BITMASK
= ((
uint32_t
)(0xF)),
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}
SSP_Int_Mask_Type
;
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typedef
enum
{
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SSP_RORMIS
= ((
uint32_t
)(1 << 0)),
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SSP_RTMIS
= ((
uint32_t
)(1 << 1)),
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SSP_RXMIS
= ((
uint32_t
)(1 << 2)),
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SSP_TXMIS
= ((
uint32_t
)(1 << 3)),
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SSP_MASK_INT_STAT_BITMASK
= ((
uint32_t
)(0xF)),
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}
SSP_Mask_Int_Status_Type
;
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typedef
enum
{
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SSP_RORRIS
= ((
uint32_t
)(1 << 0)),
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SSP_RTRIS
= ((
uint32_t
)(1 << 1)),
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SSP_RXRIS
= ((
uint32_t
)(1 << 2)),
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SSP_TXRIS
= ((
uint32_t
)(1 << 3)),
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SSP_RAW_INT_STAT_BITMASK
= ((
uint32_t
)(0xF)),
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}
SSP_Raw_Int_Status_Type
;
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typedef
enum
{
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SSP_RORIC
= 0x0,
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SSP_RTIC
= 0x1,
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SSP_INT_CLEAR_BITMASK
= 0x3,
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}
SSP_Int_Clear_Type
;
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typedef
enum
SSP_DMA_Type
{
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SSP_DMA_RX
= (1u),
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SSP_DMA_TX
= (1u << 1),
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}
SSP_DMA_Type
;
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void
IP_SSP_DeInit
(
IP_SSP_001_Type
*pSSP);
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void
IP_SSP_Cmd
(
IP_SSP_001_Type
*pSSP,
FunctionalState
NewState);
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void
IP_SSP_LoopBackCmd
(
IP_SSP_001_Type
*pSSP,
FunctionalState
NewState);
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FlagStatus
IP_SSP_GetStatus
(
IP_SSP_001_Type
*pSSP,
SSP_Status_Type
Stat
);
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uint32_t
IP_SSP_GetIntStatus
(
IP_SSP_001_Type
*pSSP);
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IntStatus
IP_SSP_GetRawIntStatus
(
IP_SSP_001_Type
*pSSP,
SSP_Raw_Int_Status_Type
RawInt);
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uint8_t
IP_SSP_GetDataSize
(
IP_SSP_001_Type
*pSSP);
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void
IP_SSP_ClearIntPending
(
IP_SSP_001_Type
*pSSP,
SSP_Int_Clear_Type
IntClear);
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void
IP_SSP_Int_Enable
(
IP_SSP_001_Type
*pSSP,
SSP_Int_Mask_Type
IntType,
FunctionalState
NewState);
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uint16_t
IP_SSP_ReceiveFrame
(
IP_SSP_001_Type
*pSSP);
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void
IP_SSP_SendFrame
(
IP_SSP_001_Type
*pSSP, uint16_t tx_data);
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void
IP_SSP_Set_ClockRate
(
IP_SSP_001_Type
*pSSP,
uint32_t
clk_rate,
uint32_t
prescale);
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void
IP_SSP_Set_Format
(
IP_SSP_001_Type
*pSSP,
uint32_t
bits,
uint32_t
frameFormat,
uint32_t
clockFormat);
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void
IP_SSP_Set_Mode
(
IP_SSP_001_Type
*pSSP,
uint32_t
mode
);
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void
IP_SSP_DMA_Cmd
(
IP_SSP_001_Type
*pSSP,
SSP_DMA_Type
ssp_dma_t,
FunctionalState
NewState);
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __SSP_001_H_ */
software
lpc_core
lpc_ip
ssp_001.h
Generated on Fri Nov 16 2012 13:36:44 for LPCOpen Platform by
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