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i2s_18xx_43xx.h
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1 /*
2  * @brief LPC18xx/43xx I2S driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __I2S_18XX_43XX_H_
33 #define __I2S_18XX_43XX_H_
34 
35 #include "chip.h"
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
46 #define I2S_DMA_REQUEST_NUMBER_1 IP_I2S_DMA_REQUEST_NUMBER_1
47 #define I2S_DMA_REQUEST_NUMBER_2 IP_I2S_DMA_REQUEST_NUMBER_2
48 
52 typedef struct {
54  uint8_t ChannelNumber;
55  uint8_t WordWidth;
57 
64 {
65  IP_I2S_Init(pI2S);
66 }
67 
75 {
76  IP_I2S_DeInit(pI2S);
77 }
78 
87 {
88  IP_I2S_Send(pI2S, data);
89 }
90 
98 {
99  return IP_I2S_Receive(pI2S);
100 }
101 
108 STATIC INLINE void Chip_I2S_Start(LPC_I2S_Type *pI2S, uint8_t TRMode)
109 {
110  IP_I2S_Start(pI2S, TRMode);
111 }
112 
119 STATIC INLINE void Chip_I2S_Pause(LPC_I2S_Type *pI2S, uint8_t TRMode)
120 {
121  IP_I2S_Pause(pI2S, TRMode);
122 }
123 
132 {
133  IP_I2S_Mute(pI2S, NewState);
134 }
135 
143 STATIC INLINE void Chip_I2S_Stop(LPC_I2S_Type *pI2S, uint8_t TRMode)
144 {
145  IP_I2S_Stop(pI2S, TRMode);
146 }
147 
162  uint8_t TRMode,
163  uint32_t clksel,
164  uint32_t fpin,
165  uint32_t mcena)
166 {
167  IP_I2S_ModeConfig(pI2S, TRMode, clksel, fpin, mcena);
168 }
169 
176 STATIC INLINE uint8_t Chip_I2S_GetLevel(LPC_I2S_Type *pI2S, uint8_t TRMode)
177 {
178  return IP_I2S_GetLevel(pI2S, TRMode);
179 }
180 
188 Status Chip_I2S_Config(LPC_I2S_Type *pI2S, uint8_t TRMode, Chip_I2S_Audio_Format_Type *audio_format);
189 
198 void Chip_I2S_Int_Cmd(LPC_I2S_Type *pI2S, uint8_t TRMode, FunctionalState NewState, uint8_t FIFO_Depth);
199 
211 void Chip_I2S_DMA_Cmd(LPC_I2S_Type *pI2S, uint8_t TRMode, uint8_t DMANum, FunctionalState NewState, uint8_t FIFO_Depth);
212 
217 #ifdef __cplusplus
218 }
219 #endif
220 
221 #endif /* __I2S_18XX_43XX_H_ */