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IP: I2C register block and driver

Data Structures

struct  IP_I2C_001_Type
 I2C register block structure. More...
 
struct  I2C_M_SETUP_Type
 Master transfer setup data structure definitions. More...
 
struct  I2C_S_SETUP_Type
 Slave transfer setup data structure definitions. More...
 
struct  I2C_OWNSLAVEADDR_CFG_Type
 I2C Own slave address setting structure. More...
 

Macros

#define I2C_STA_STO_RECV   0x20
 I2C state handle return values.
 
#define I2C_STA_STO_RECV   0x20
 I2C state handle return values.
 
#define I2C_I2CONSET_AA   ((0x04))
 I2C Control Set register description.
 
#define I2C_I2CONSET_SI   ((0x08))
 
#define I2C_I2CONSET_STO   ((0x10))
 
#define I2C_I2CONSET_STA   ((0x20))
 
#define I2C_I2CONSET_I2EN   ((0x40))
 
#define I2C_I2CONCLR_AAC   ((1 << 2))
 I2C Control Clear register description.
 
#define I2C_I2CONCLR_SIC   ((1 << 3))
 
#define I2C_I2CONCLR_STOC   ((1 << 4))
 
#define I2C_I2CONCLR_STAC   ((1 << 5))
 
#define I2C_I2CONCLR_I2ENC   ((1 << 6))
 
#define I2C_STAT_CODE_BITMASK   ((0xF8))
 I2C Status Code definition (I2C Status register)
 
#define I2C_STAT_CODE_ERROR   ((0xFF))
 
#define I2C_I2STAT_NO_INF   ((0xF8))
 I2C return status code definitions.
 
#define I2C_I2STAT_BUS_ERROR   ((0x00))
 
#define I2C_I2STAT_M_TX_START   ((0x08))
 I2C Master transmit mode.
 
#define I2C_I2STAT_M_TX_RESTART   ((0x10))
 
#define I2C_I2STAT_M_TX_SLAW_ACK   ((0x18))
 
#define I2C_I2STAT_M_TX_SLAW_NACK   ((0x20))
 
#define I2C_I2STAT_M_TX_DAT_ACK   ((0x28))
 
#define I2C_I2STAT_M_TX_DAT_NACK   ((0x30))
 
#define I2C_I2STAT_M_TX_ARB_LOST   ((0x38))
 
#define I2C_I2STAT_M_RX_START   ((0x08))
 I2C Master receive mode.
 
#define I2C_I2STAT_M_RX_RESTART   ((0x10))
 
#define I2C_I2STAT_M_RX_ARB_LOST   ((0x38))
 
#define I2C_I2STAT_M_RX_SLAR_ACK   ((0x40))
 
#define I2C_I2STAT_M_RX_SLAR_NACK   ((0x48))
 
#define I2C_I2STAT_M_RX_DAT_ACK   ((0x50))
 
#define I2C_I2STAT_M_RX_DAT_NACK   ((0x58))
 
#define I2C_I2STAT_S_RX_SLAW_ACK   ((0x60))
 I2C Slave receive mode.
 
#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA   ((0x68))
 
#define I2C_I2STAT_S_RX_GENCALL_ACK   ((0x70))
 
#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL   ((0x78))
 
#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK   ((0x80))
 
#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK   ((0x88))
 
#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK   ((0x90))
 
#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK   ((0x98))
 
#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX   ((0xA0))
 
#define I2C_I2STAT_S_TX_SLAR_ACK   ((0xA8))
 I2C Slave transmit mode.
 
#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA   ((0xB0))
 
#define I2C_I2STAT_S_TX_DAT_ACK   ((0xB8))
 
#define I2C_I2STAT_S_TX_DAT_NACK   ((0xC0))
 
#define I2C_I2STAT_S_TX_LAST_DAT_ACK   ((0xC8))
 
#define I2C_SLAVE_TIME_OUT   0x10000000UL
 
#define I2C_I2DAT_BITMASK   ((0xFF))
 I2C Data register definition.
 
#define I2C_I2DAT_IDLE_CHAR   (0xFF)
 
#define I2C_I2MMCTRL_MM_ENA   ((1 << 0))
 I2C Monitor mode control register description.
 
#define I2C_I2MMCTRL_ENA_SCL   ((1 << 1))
 
#define I2C_I2MMCTRL_MATCH_ALL   ((1 << 2))
 
#define I2C_I2MMCTRL_BITMASK   ((0x07))
 
#define I2DATA_BUFFER_BITMASK   ((0xFF))
 I2C Data buffer register description.
 
#define I2C_I2ADR_GC   ((1 << 0))
 I2C Slave Address registers definition.
 
#define I2C_I2ADR_BITMASK   ((0xFF))
 
#define I2C_I2MASK_MASK(n)   ((n & 0xFE))
 I2C Mask Register definition.
 
#define I2C_I2SCLH_BITMASK   ((0xFFFF))
 I2C SCL HIGH duty cycle Register definition.
 
#define I2C_I2SCLL_BITMASK   ((0xFFFF))
 I2C SCL LOW duty cycle Register definition.
 
#define I2C_SETUP_STATUS_ARBF   (1 << 8)
 I2C status values.
 
#define I2C_SETUP_STATUS_NOACKF   (1 << 9)
 
#define I2C_SETUP_STATUS_DONE   (1 << 10)
 
#define I2C_OK   0x00
 I2C state handle return values.
 
#define I2C_BYTE_SENT   0x01
 
#define I2C_BYTE_RECV   0x02
 
#define I2C_LAST_BYTE_RECV   0x04
 
#define I2C_SEND_END   0x08
 
#define I2C_RECV_END   0x10
 
#define I2C_ERR   (0x10000000)
 
#define I2C_NAK_RECV   (0x10000000 | 0x01)
 
#define I2C_CheckError(ErrorCode)   (ErrorCode & 0x10000000)
 
#define I2C_MONITOR_CFG_SCL_OUTPUT   I2C_I2MMCTRL_ENA_SCL
 I2C monitor control configuration defines.
 
#define I2C_MONITOR_CFG_MATCHALL   I2C_I2MMCTRL_MATCH_ALL
 

Enumerations

enum  I2C_TRANSFER_OPT_Type { I2C_TRANSFER_POLLING = 0, I2C_TRANSFER_INTERRUPT }
 Transfer option type definitions. More...
 
enum  I2C_Mode { I2C_MASTER_MODE, I2C_SLAVE_MODE, I2C_GENERAL_MODE }
 
enum  I2C_ID_Type { I2C0 = 0 }
 

Functions

void IP_I2C_Init (IP_I2C_001_Type *LPC_I2C)
 Initializes the LPC_I2C peripheral.
 
void IP_I2C_DeInit (IP_I2C_001_Type *LPC_I2C)
 De-initializes the I2C peripheral registers to their default reset values.
 
void IP_I2C_SetClockRate (IP_I2C_001_Type *LPC_I2C, uint32_t SCLValue)
 Set up clock rate for I2Cx.
 
void IP_I2C_Cmd (IP_I2C_001_Type *LPC_I2C, I2C_Mode Mode, FunctionalState NewState)
 Enable or disable I2C peripheral's operation.
 
void IP_I2C_Interrupt_MasterHandler (IP_I2C_001_Type *LPC_I2C, I2C_ID_Type I2C_Num)
 General Master Interrupt handler for I2C peripheral.
 
void IP_I2C_Interrupt_SlaveHandler (IP_I2C_001_Type *LPC_I2C, I2C_ID_Type I2C_Num)
 General Slave Interrupt handler for I2C peripheral.
 
Status IP_I2C_MasterTransferData (IP_I2C_001_Type *LPC_I2C, I2C_ID_Type I2C_Num, I2C_M_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
 Transmit and Receive data in master mode.
 
Status IP_I2C_SlaveTransferData (IP_I2C_001_Type *LPC_I2C, I2C_ID_Type I2C_Num, I2C_S_SETUP_Type *TransferCfg, I2C_TRANSFER_OPT_Type Opt)
 Receive and Transmit data in slave mode.
 
bool IP_I2C_Interrupt_MasterTransferComplete (I2C_ID_Type I2C_Num)
 Get status of Master Transfer.
 
bool IP_I2C_Interrupt_SlaveTransferComplete (I2C_ID_Type I2C_Num)
 Get status of Slave Transfer.
 
void IP_I2C_SetOwnSlaveAddr (IP_I2C_001_Type *LPC_I2C, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
 Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.
 

Detailed Description

Macro Definition Documentation

#define I2C_BYTE_RECV   0x02

Definition at line 203 of file i2c_001.h.

#define I2C_BYTE_SENT   0x01

Definition at line 202 of file i2c_001.h.

#define I2C_CheckError (   ErrorCode)    (ErrorCode & 0x10000000)

Definition at line 212 of file i2c_001.h.

#define I2C_ERR   (0x10000000)

Definition at line 209 of file i2c_001.h.

#define I2C_I2ADR_BITMASK   ((0xFF))

I2C Slave Address registers bit mask

Definition at line 174 of file i2c_001.h.

#define I2C_I2ADR_GC   ((1 << 0))

I2C Slave Address registers definition.

General Call enable bit

Definition at line 173 of file i2c_001.h.

#define I2C_I2CONCLR_AAC   ((1 << 2))

I2C Control Clear register description.

Assert acknowledge Clear bit

Definition at line 83 of file i2c_001.h.

#define I2C_I2CONCLR_I2ENC   ((1 << 6))

I2C interface Disable bit

Definition at line 87 of file i2c_001.h.

#define I2C_I2CONCLR_SIC   ((1 << 3))

I2C interrupt Clear bit

Definition at line 84 of file i2c_001.h.

#define I2C_I2CONCLR_STAC   ((1 << 5))

START flag Clear bit

Definition at line 86 of file i2c_001.h.

#define I2C_I2CONCLR_STOC   ((1 << 4))

I2C STOP Clear bit

Definition at line 85 of file i2c_001.h.

#define I2C_I2CONSET_AA   ((0x04))

I2C Control Set register description.

Assert acknowledge flag

Definition at line 74 of file i2c_001.h.

#define I2C_I2CONSET_I2EN   ((0x40))

I2C interface enable

Definition at line 78 of file i2c_001.h.

#define I2C_I2CONSET_SI   ((0x08))

I2C interrupt flag

Definition at line 75 of file i2c_001.h.

#define I2C_I2CONSET_STA   ((0x20))

START flag

Definition at line 77 of file i2c_001.h.

#define I2C_I2CONSET_STO   ((0x10))

STOP flag

Definition at line 76 of file i2c_001.h.

#define I2C_I2DAT_BITMASK   ((0xFF))

I2C Data register definition.

Mask for I2DAT register

Definition at line 153 of file i2c_001.h.

#define I2C_I2DAT_IDLE_CHAR   (0xFF)

Idle data value will be send out in slave mode in case of the actual expecting data requested from the master is greater than its sending data length that can be supported

Definition at line 154 of file i2c_001.h.

#define I2C_I2MASK_MASK (   n)    ((n & 0xFE))

I2C Mask Register definition.

I2C Mask Register mask field

Definition at line 179 of file i2c_001.h.

#define I2C_I2MMCTRL_BITMASK   ((0x07))

Mask for I2MMCTRL register

Definition at line 163 of file i2c_001.h.

#define I2C_I2MMCTRL_ENA_SCL   ((1 << 1))

SCL output enable

Definition at line 161 of file i2c_001.h.

#define I2C_I2MMCTRL_MATCH_ALL   ((1 << 2))

Select interrupt register match

Definition at line 162 of file i2c_001.h.

#define I2C_I2MMCTRL_MM_ENA   ((1 << 0))

I2C Monitor mode control register description.

Monitor mode enable

Definition at line 160 of file i2c_001.h.

#define I2C_I2SCLH_BITMASK   ((0xFFFF))

I2C SCL HIGH duty cycle Register definition.

I2C SCL HIGH duty cycle Register bit mask

Definition at line 184 of file i2c_001.h.

#define I2C_I2SCLL_BITMASK   ((0xFFFF))

I2C SCL LOW duty cycle Register definition.

I2C SCL LOW duty cycle Register bit mask

Definition at line 189 of file i2c_001.h.

#define I2C_I2STAT_BUS_ERROR   ((0x00))

Bus Error

Definition at line 99 of file i2c_001.h.

#define I2C_I2STAT_M_RX_ARB_LOST   ((0x38))

Arbitration lost

Definition at line 117 of file i2c_001.h.

#define I2C_I2STAT_M_RX_DAT_ACK   ((0x50))

Data has been received, ACK has been returned

Definition at line 120 of file i2c_001.h.

#define I2C_I2STAT_M_RX_DAT_NACK   ((0x58))

Data has been received, NACK has been returned

Definition at line 121 of file i2c_001.h.

#define I2C_I2STAT_M_RX_RESTART   ((0x10))

A repeat start condition has been transmitted

Definition at line 116 of file i2c_001.h.

#define I2C_I2STAT_M_RX_SLAR_ACK   ((0x40))

SLA+R has been transmitted, ACK has been received

Definition at line 118 of file i2c_001.h.

#define I2C_I2STAT_M_RX_SLAR_NACK   ((0x48))

SLA+R has been transmitted, NACK has been received

Definition at line 119 of file i2c_001.h.

#define I2C_I2STAT_M_RX_START   ((0x08))

I2C Master receive mode.

A start condition has been transmitted

Definition at line 115 of file i2c_001.h.

#define I2C_I2STAT_M_TX_ARB_LOST   ((0x38))

Arbitration lost in SLA+R/W or Data bytes

Definition at line 110 of file i2c_001.h.

#define I2C_I2STAT_M_TX_DAT_ACK   ((0x28))

Data has been transmitted, ACK has been received

Definition at line 108 of file i2c_001.h.

#define I2C_I2STAT_M_TX_DAT_NACK   ((0x30))

Data has been transmitted, NACK has been received

Definition at line 109 of file i2c_001.h.

#define I2C_I2STAT_M_TX_RESTART   ((0x10))

A repeat start condition has been transmitted

Definition at line 105 of file i2c_001.h.

#define I2C_I2STAT_M_TX_SLAW_ACK   ((0x18))

SLA+W has been transmitted, ACK has been received

Definition at line 106 of file i2c_001.h.

#define I2C_I2STAT_M_TX_SLAW_NACK   ((0x20))

SLA+W has been transmitted, NACK has been received

Definition at line 107 of file i2c_001.h.

#define I2C_I2STAT_M_TX_START   ((0x08))

I2C Master transmit mode.

A start condition has been transmitted

Definition at line 104 of file i2c_001.h.

#define I2C_I2STAT_NO_INF   ((0xF8))

I2C return status code definitions.

No relevant information

Definition at line 98 of file i2c_001.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_GENCALL   ((0x78))

Arbitration lost in SLA+R/W (GENERAL CALL) as master

Definition at line 130 of file i2c_001.h.

#define I2C_I2STAT_S_RX_ARB_LOST_M_SLA   ((0x68))

Arbitration lost in SLA+R/W as master

Definition at line 127 of file i2c_001.h.

#define I2C_I2STAT_S_RX_GENCALL_ACK   ((0x70))

General call address has been received, ACK has been returned

Definition at line 129 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_ACK   ((0x90))

Previously addressed with General Call; Data has been received and ACK has been returned

Definition at line 134 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_GENCALL_DAT_NACK   ((0x98))

Previously addressed with General Call; Data has been received and NOT ACK has been returned

Definition at line 135 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_ACK   ((0x80))

Previously addressed with own SLA; Data has been received, ACK has been returned

Definition at line 132 of file i2c_001.h.

#define I2C_I2STAT_S_RX_PRE_SLA_DAT_NACK   ((0x88))

Previously addressed with own SLA;Data has been received and NOT ACK has been returned

Definition at line 133 of file i2c_001.h.

#define I2C_I2STAT_S_RX_SLAW_ACK   ((0x60))

I2C Slave receive mode.

Own slave address has been received, ACK has been returned

Definition at line 126 of file i2c_001.h.

#define I2C_I2STAT_S_RX_STA_STO_SLVREC_SLVTRX   ((0xA0))

A STOP condition or repeated START condition has been received while still addressed as SLV/REC (Slave Receive) or SLV/TRX (Slave Transmit)

Definition at line 136 of file i2c_001.h.

#define I2C_I2STAT_S_TX_ARB_LOST_M_SLA   ((0xB0))

Arbitration lost in SLA+R/W as master

Definition at line 143 of file i2c_001.h.

#define I2C_I2STAT_S_TX_DAT_ACK   ((0xB8))

Data has been transmitted, ACK has been received

Definition at line 145 of file i2c_001.h.

#define I2C_I2STAT_S_TX_DAT_NACK   ((0xC0))

Data has been transmitted, NACK has been received

Definition at line 146 of file i2c_001.h.

#define I2C_I2STAT_S_TX_LAST_DAT_ACK   ((0xC8))

Last data byte in I2DAT has been transmitted (AA = 0); ACK has been received

Definition at line 147 of file i2c_001.h.

#define I2C_I2STAT_S_TX_SLAR_ACK   ((0xA8))

I2C Slave transmit mode.

Own SLA+R has been received, ACK has been returned

Definition at line 142 of file i2c_001.h.

#define I2C_LAST_BYTE_RECV   0x04

Definition at line 204 of file i2c_001.h.

#define I2C_MONITOR_CFG_MATCHALL   I2C_I2MMCTRL_MATCH_ALL

Select interrupt register match

Definition at line 218 of file i2c_001.h.

#define I2C_MONITOR_CFG_SCL_OUTPUT   I2C_I2MMCTRL_ENA_SCL

I2C monitor control configuration defines.

SCL output enable

Definition at line 217 of file i2c_001.h.

#define I2C_NAK_RECV   (0x10000000 | 0x01)

Definition at line 210 of file i2c_001.h.

#define I2C_OK   0x00

I2C state handle return values.

Definition at line 201 of file i2c_001.h.

#define I2C_RECV_END   0x10

Definition at line 206 of file i2c_001.h.

#define I2C_SEND_END   0x08

Definition at line 205 of file i2c_001.h.

#define I2C_SETUP_STATUS_ARBF   (1 << 8)

I2C status values.

Arbitration false

Definition at line 194 of file i2c_001.h.

#define I2C_SETUP_STATUS_DONE   (1 << 10)

Status DONE

Definition at line 196 of file i2c_001.h.

#define I2C_SETUP_STATUS_NOACKF   (1 << 9)

No ACK returned

Definition at line 195 of file i2c_001.h.

#define I2C_SLAVE_TIME_OUT   0x10000000UL

Time out in case of using I2C slave mode

Definition at line 148 of file i2c_001.h.

#define I2C_STA_STO_RECV   0x20

I2C state handle return values.

Definition at line 207 of file i2c_001.h.

#define I2C_STA_STO_RECV   0x20

I2C state handle return values.

Definition at line 207 of file i2c_001.h.

#define I2C_STAT_CODE_BITMASK   ((0xF8))

I2C Status Code definition (I2C Status register)

Return Code mask in I2C status register

Definition at line 92 of file i2c_001.h.

#define I2C_STAT_CODE_ERROR   ((0xFF))

Return Code error mask in I2C status register

Definition at line 93 of file i2c_001.h.

#define I2DATA_BUFFER_BITMASK   ((0xFF))

I2C Data buffer register description.

I2C Data buffer register bit mask

Definition at line 168 of file i2c_001.h.

Enumeration Type Documentation

Enumerator:
I2C0 

Definition at line 278 of file i2c_001.h.

enum I2C_Mode
Enumerator:
I2C_MASTER_MODE 
I2C_SLAVE_MODE 
I2C_GENERAL_MODE 

Definition at line 272 of file i2c_001.h.

Transfer option type definitions.

Enumerator:
I2C_TRANSFER_POLLING 

Transfer in polling mode

I2C_TRANSFER_INTERRUPT 

Transfer in interrupt mode

Definition at line 252 of file i2c_001.h.

Function Documentation

void IP_I2C_Cmd ( IP_I2C_001_Type LPC_I2C,
I2C_Mode  Mode,
FunctionalState  NewState 
)

Enable or disable I2C peripheral's operation.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
Mode: I2C mode, should be I2C_MASTER_MODE, I2C_SLAVE_MODE or I2C_GENERAL_MODE
NewState: New State of LPC_I2C peripheral's operation, should be ENABLE or DISABLE
Returns
Nothing

Definition at line 477 of file i2c_001.c.

void IP_I2C_DeInit ( IP_I2C_001_Type LPC_I2C)

De-initializes the I2C peripheral registers to their default reset values.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
Returns
Nothing

Definition at line 463 of file i2c_001.c.

void IP_I2C_Init ( IP_I2C_001_Type LPC_I2C)

Initializes the LPC_I2C peripheral.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
Returns
Nothing

Definition at line 456 of file i2c_001.c.

void IP_I2C_Interrupt_MasterHandler ( IP_I2C_001_Type LPC_I2C,
I2C_ID_Type  I2C_Num 
)

General Master Interrupt handler for I2C peripheral.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
I2C_Num: I2C port number, should be I2C0, I2C1 or I2C2
Returns
Nothing

Definition at line 493 of file i2c_001.c.

bool IP_I2C_Interrupt_MasterTransferComplete ( I2C_ID_Type  I2C_Num)

Get status of Master Transfer.

Parameters
I2C_Num: I2C port number, should be I2C0, I2C1 or I2C2
Returns
Master transfer status, could be TRUE (completed) or FALSE (not completed yet)

Definition at line 734 of file i2c_001.c.

void IP_I2C_Interrupt_SlaveHandler ( IP_I2C_001_Type LPC_I2C,
I2C_ID_Type  I2C_Num 
)

General Slave Interrupt handler for I2C peripheral.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
I2C_Num: I2C port number, should be I2C0, I2C1 or I2C2
Returns
Nothing

Definition at line 550 of file i2c_001.c.

bool IP_I2C_Interrupt_SlaveTransferComplete ( I2C_ID_Type  I2C_Num)

Get status of Slave Transfer.

Parameters
I2C_Num: I2C port number, should be I2C0, I2C1 or I2C2
Returns
Slave transfer status, could be TRUE (completed) or FALSE (not completed yet)

Definition at line 746 of file i2c_001.c.

Status IP_I2C_MasterTransferData ( IP_I2C_001_Type LPC_I2C,
I2C_ID_Type  I2C_Num,
I2C_M_SETUP_Type TransferCfg,
I2C_TRANSFER_OPT_Type  Opt 
)

Transmit and Receive data in master mode.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
I2C_Num: I2C port number, should be I2C0, I2C1 or I2C2
TransferCfg: Pointer to a I2C_M_SETUP_Type structure that contains specified information about the configuration for master transfer.
Opt: a I2C_TRANSFER_OPT_Type type that selected for interrupt or polling mode.
Returns
SUCCESS or ERROR

Note:

  • In case of using I2C to transmit/receive data only, either transmit/receive length set to 0 or transmit/receive data pointer set to NULL.
  • In case of using I2C to transmit followed by receive data, transmit length, transmit data pointer, receive length and receive data pointer should be set corresponding.

Definition at line 580 of file i2c_001.c.

void IP_I2C_SetClockRate ( IP_I2C_001_Type LPC_I2C,
uint32_t  SCLValue 
)

Set up clock rate for I2Cx.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
SCLValue: Value of I2CSCL register
Returns
Nothing

Definition at line 470 of file i2c_001.c.

void IP_I2C_SetOwnSlaveAddr ( IP_I2C_001_Type LPC_I2C,
I2C_OWNSLAVEADDR_CFG_Type OwnSlaveAddrConfigStruct 
)

Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct.

Parameters
LPC_I2C: I2C peripheral selected
OwnSlaveAddrConfigStruct: Pointer to a I2C_OWNSLAVEADDR_CFG_Type structure that contains the configuration information for the specified I2C slave address.
Returns
Nothing

Definition at line 758 of file i2c_001.c.

Status IP_I2C_SlaveTransferData ( IP_I2C_001_Type LPC_I2C,
I2C_ID_Type  I2C_Num,
I2C_S_SETUP_Type TransferCfg,
I2C_TRANSFER_OPT_Type  Opt 
)

Receive and Transmit data in slave mode.

Parameters
LPC_I2C: Pointer to selected I2Cx peripheral
I2C_Num: I2C port number, should be I2C0, I2C1 or I2C2
TransferCfg: Pointer to a I2C_S_SETUP_Type structure that contains specified information about the configuration for master transfer.
Opt: I2C_TRANSFER_OPT_Type type that selected for interrupt or polling mode.
Returns
SUCCESS or ERROR

Note: The mode of slave's operation depends on the command sent from master on the I2C bus. If the master send a SLA+W command, this sub-routine will use receive data length and receive data pointer. If the master send a SLA+R command, this sub-routine will use transmit data length and transmit data pointer. If the master issue an repeat start command or a stop command, the slave will enable an time out condition, during time out condition, if there's no activity on I2C bus, the slave will exit, otherwise (i.e. the master send a SLA+R/W), the slave then switch to relevant operation mode. The time out should be used because the return status code can not show difference from stop and repeat start command in slave operation. In case of the expected data length from master is greater than data length that slave can support:

  • In case of reading operation (from master): slave will return I2C_I2DAT_IDLE_CHAR value.
  • In case of writing operation (from master): slave will ignore remain data from master.

Definition at line 660 of file i2c_001.c.