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LPCOpen Platform for NXP LPC Microcontrollers
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enet_18xx_43xx.c
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1 /*
2  * @brief LPC18xx/43xx ethernet driver
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #include "enet_18xx_43xx.h"
33 
34 /*****************************************************************************
35  * Private types/enumerations/variables
36  ****************************************************************************/
37 
38 /*****************************************************************************
39  * Public types/enumerations/variables
40  ****************************************************************************/
41 
42 /*****************************************************************************
43  * Private functions
44  ****************************************************************************/
45 
46 /*****************************************************************************
47  * Public functions
48  ****************************************************************************/
49 
50 /* Basic Ethernet interface initialization */
51 void Chip_ENET_Init(void)
52 {
53  LPC_CREG->CREG6 &= ~0x7;
54 
55  /* Enable ethernet clock */
56  Chip_Clock_EnableOpts(CLK_MX_ETHERNET, true, true, 1);
57 
58  /* PHY TX/RX base clock routing is setup as part of SystemInit() */
59 
60 #if defined(USE_RMII)
61  LPC_CREG->CREG6 |= 0x4;
62 #endif
63 
64  /* Reset ethernet and wait for reset to complete */
67 
68  /* Reset ethernet peripheral */
70 
71  /* Setup MII link divider to /102 and PHY address 1 */
72  Chip_ENET_Setup_MII(4, 1);
73 
75 }
76 
77 /* Ethernet interface shutdown */
78 void Chip_ENET_DeInit(void)
79 {
82 }