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CHIP: LPC43xx Peripheral addresses and register set declarations

Macros

#define LPC_SCT_BASE   0x40000000
 
#define LPC_GPDMA_BASE   0x40002000
 
#define LPC_SDMMC_BASE   0x40004000
 
#define LPC_EMC_BASE   0x40005000
 
#define LPC_USB0_BASE   0x40006000
 
#define LPC_USB1_BASE   0x40007000
 
#define LPC_LCD_BASE   0x40008000
 
#define LPC_ETHERNET_BASE   0x40010000
 
#define LPC_ATIMER_BASE   0x40040000
 
#define LPC_REGFILE_BASE   0x40041000
 
#define LPC_PMC_BASE   0x40042000
 
#define LPC_CREG_BASE   0x40043000
 
#define LPC_EVRT_BASE   0x40044000
 
#define LPC_RTC_BASE   0x40046000
 
#define LPC_CGU_BASE   0x40050000
 
#define LPC_CCU1_BASE   0x40051000
 
#define LPC_CCU2_BASE   0x40052000
 
#define LPC_RGU_BASE   0x40053000
 
#define LPC_WWDT_BASE   0x40080000
 
#define LPC_USART0_BASE   0x40081000
 
#define LPC_USART2_BASE   0x400C1000
 
#define LPC_USART3_BASE   0x400C2000
 
#define LPC_UART1_BASE   0x40082000
 
#define LPC_SSP0_BASE   0x40083000
 
#define LPC_SSP1_BASE   0x400C5000
 
#define LPC_TIMER0_BASE   0x40084000
 
#define LPC_TIMER1_BASE   0x40085000
 
#define LPC_TIMER2_BASE   0x400C3000
 
#define LPC_TIMER3_BASE   0x400C4000
 
#define LPC_SCU_BASE   0x40086000
 
#define LPC_GPIO_PIN_INT_BASE   0x40087000
 
#define LPC_GPIO_GROUP_INT0_BASE   0x40088000
 
#define LPC_GPIO_GROUP_INT1_BASE   0x40089000
 
#define LPC_MCPWM_BASE   0x400A0000
 
#define LPC_I2C0_BASE   0x400A1000
 
#define LPC_I2C1_BASE   0x400E0000
 
#define LPC_I2S0_BASE   0x400A2000
 
#define LPC_I2S1_BASE   0x400A3000
 
#define LPC_C_CAN1_BASE   0x400A4000
 
#define LPC_RITIMER_BASE   0x400C0000
 
#define LPC_QEI_BASE   0x400C6000
 
#define LPC_GIMA_BASE   0x400C7000
 
#define LPC_DAC_BASE   0x400E1000
 
#define LPC_C_CAN0_BASE   0x400E2000
 
#define LPC_ADC0_BASE   0x400E3000
 
#define LPC_ADC1_BASE   0x400E4000
 
#define LPC_GPIO_PORT_BASE   0x400F4000
 
#define LPC_SPI_BASE   0x40100000
 
#define LPC_SGPIO_BASE   0x40101000
 
#define LPC_SCT   ((IP_SCT_001_Type *) LPC_SCT_BASE)
 
#define LPC_GPDMA   ((IP_GPDMA_001_Type *) LPC_GPDMA_BASE)
 
#define LPC_SDMMC   ((IP_SDMMC_001_Type *) LPC_SDMMC_BASE)
 
#define LPC_EMC   ((IP_EMC_001_Type *) LPC_EMC_BASE)
 
#define LPC_USB0   ((IP_USBHS_001_Type *) LPC_USB0_BASE)
 
#define LPC_USB1   ((IP_USBHS_001_Type *) LPC_USB1_BASE)
 
#define LPC_LCD   ((IP_LCD_001_Type *) LPC_LCD_BASE)
 
#define LPC_ETHERNET   ((IP_ENET_001_Type *) LPC_ETHERNET_BASE)
 
#define LPC_ATIMER   ((IP_ATIMER_001_Type *) LPC_ATIMER_BASE)
 
#define LPC_REGFILE   ((IP_REGFILE_001_T *) LPC_REGFILE_BASE)
 
#define LPC_PMC   ((IP_PMC_001_Type *) LPC_PMC_BASE)
 
#define LPC_EVRT   ((LPC_EVRT_Type *) LPC_EVRT_BASE)
 
#define LPC_RTC   ((IP_RTC_001_T *) LPC_RTC_BASE)
 
#define LPC_CGU   ((LPC_CGU_T *) LPC_CGU_BASE)
 
#define LPC_CCU1   ((LPC_CCU1_Type *) LPC_CCU1_BASE)
 
#define LPC_CCU2   ((LPC_CCU2_Type *) LPC_CCU2_BASE)
 
#define LPC_CREG   ((LPC_CREG_T *) LPC_CREG_BASE)
 
#define LPC_RGU   ((LPC_RGU_T *) LPC_RGU_BASE)
 
#define LPC_WWDT   ((IP_WWDT_001_Type *) LPC_WWDT_BASE)
 
#define LPC_USART0   ((IP_USART_001_Type *) LPC_USART0_BASE)
 
#define LPC_USART2   ((IP_USART_001_Type *) LPC_USART2_BASE)
 
#define LPC_USART3   ((IP_USART_001_Type *) LPC_USART3_BASE)
 
#define LPC_UART1   ((IP_USART_001_Type *) LPC_UART1_BASE)
 
#define LPC_SSP0   ((IP_SSP_001_Type *) LPC_SSP0_BASE)
 
#define LPC_SSP1   ((IP_SSP_001_Type *) LPC_SSP1_BASE)
 
#define LPC_TIMER0   ((IP_TIMER_001_Type *) LPC_TIMER0_BASE)
 
#define LPC_TIMER1   ((IP_TIMER_001_Type *) LPC_TIMER1_BASE)
 
#define LPC_TIMER2   ((IP_TIMER_001_Type *) LPC_TIMER2_BASE)
 
#define LPC_TIMER3   ((IP_TIMER_001_Type *) LPC_TIMER3_BASE)
 
#define LPC_SCU   ((LPC_SCU_Type *) LPC_SCU_BASE)
 
#define LPC_GPIO_PIN_INT   ((IP_GPIOPININT_001_Type *) LPC_GPIO_PIN_INT_BASE)
 
#define LPC_GPIO_GROUP_INT0   ((IP_GPIOGROUPINT_001_Type *) LPC_GPIO_GROUP_INT0_BASE)
 
#define LPC_GPIO_GROUP_INT1   ((IP_GPIOGROUPINT_001_Type *) LPC_GPIO_GROUP_INT1_BASE)
 
#define LPC_MCPWM   ((IP_MCPWM_001_Type *) LPC_MCPWM_BASE)
 
#define LPC_I2C0   ((IP_I2C_001_Type *) LPC_I2C0_BASE)
 
#define LPC_I2C1   ((IP_I2C_001_Type *) LPC_I2C1_BASE)
 
#define LPC_I2S0   ((IP_I2S_001_Type *) LPC_I2S0_BASE)
 
#define LPC_I2S1   ((IP_I2S_001_Type *) LPC_I2S1_BASE)
 
#define LPC_C_CAN1   ((IP_CCAN_001_Type *) LPC_C_CAN1_BASE)
 
#define LPC_RITIMER   ((IP_RITIMER_001_Type *) LPC_RITIMER_BASE)
 
#define LPC_QEI   ((IP_QEI_001_Type *) LPC_QEI_BASE)
 
#define LPC_GIMA   ((IP_GIMA_001_Type *) LPC_GIMA_BASE)
 
#define LPC_DAC   ((IP_DAC_001_Type *) LPC_DAC_BASE)
 
#define LPC_C_CAN0   ((IP_CCAN_001_Type *) LPC_C_CAN0_BASE)
 
#define LPC_ADC0   ((IP_ADC_001_Type *) LPC_ADC0_BASE)
 
#define LPC_ADC1   ((IP_ADC_001_Type *) LPC_ADC1_BASE)
 
#define LPC_GPIO_PORT   ((IP_GPIO_001_Type *) LPC_GPIO_PORT_BASE)
 
#define LPC_SPI   ((IP_SPI_001_Type *) LPC_SPI_BASE)
 
#define LPC_SGPIO   ((IP_SGPIO_001_Type *) LPC_SGPIO_BASE)
 

Typedefs

typedef IP_SCT_001_Type LPC_SCT_Type
 
typedef IP_GPDMA_001_Type LPC_GPDMA_Type
 
typedef IP_SDMMC_001_Type LPC_SDMMC_Type
 
typedef IP_EMC_001_Type LPC_EMC_Type
 
typedef IP_USBHS_001_Type LPC_USBHS_Type
 
typedef IP_ENET_001_Type LPC_ENET_Type
 
typedef IP_ATIMER_001_Type LPC_ATIMER_Type
 
typedef IP_REGFILE_001_T LPC_REGFILE_Type
 
typedef IP_PMC_001_Type LPC_PMC_Type
 
typedef IP_RTC_001_T LPC_RTC_Type
 
typedef IP_WWDT_001_Type LPC_WWDT_Type
 
typedef IP_USART_001_Type LPC_USART_Type
 
typedef IP_SSP_001_Type LPC_SSP_Type
 
typedef IP_TIMER_001_Type LPC_TIMER_Type
 
typedef IP_GPIOPININT_001_Type LPC_GPIOPININT_Type
 
typedef IP_MCPWM_001_Type LPC_MCPWM_Type
 
typedef IP_I2C_001_Type LPC_I2C_Type
 
typedef IP_I2S_001_Type LPC_I2S_Type
 
typedef IP_CCAN_001_Type LPC_CCAN_Type
 
typedef IP_RITIMER_001_Type LPC_RITIMER_Type
 
typedef IP_QEI_001_Type LPC_QEI_Type
 
typedef IP_GIMA_001_Type LPC_GIMA_Type
 
typedef IP_DAC_001_Type LPC_DAC_Type
 
typedef IP_ADC_001_Type LPC_ADC_Type
 
typedef IP_GPIO_001_Type LPC_GPIO_Type
 
typedef IP_SPI_001_Type LPC_SPI_Type
 
typedef IP_SGPIO_001_Type LPC_SGPIO_Type
 
typedef IP_LCD_001_Type LPC_LCD_Type
 

Detailed Description

Macro Definition Documentation

#define LPC_ADC0   ((IP_ADC_001_Type *) LPC_ADC0_BASE)

Definition at line 211 of file chip_lpc43xx.h.

#define LPC_ADC0_BASE   0x400E3000

Definition at line 131 of file chip_lpc43xx.h.

#define LPC_ADC1   ((IP_ADC_001_Type *) LPC_ADC1_BASE)

Definition at line 212 of file chip_lpc43xx.h.

#define LPC_ADC1_BASE   0x400E4000

Definition at line 132 of file chip_lpc43xx.h.

#define LPC_ATIMER   ((IP_ATIMER_001_Type *) LPC_ATIMER_BASE)

Definition at line 175 of file chip_lpc43xx.h.

#define LPC_ATIMER_BASE   0x40040000

Definition at line 95 of file chip_lpc43xx.h.

#define LPC_C_CAN0   ((IP_CCAN_001_Type *) LPC_C_CAN0_BASE)

Definition at line 210 of file chip_lpc43xx.h.

#define LPC_C_CAN0_BASE   0x400E2000

Definition at line 130 of file chip_lpc43xx.h.

#define LPC_C_CAN1   ((IP_CCAN_001_Type *) LPC_C_CAN1_BASE)

Definition at line 205 of file chip_lpc43xx.h.

#define LPC_C_CAN1_BASE   0x400A4000

Definition at line 125 of file chip_lpc43xx.h.

#define LPC_CCU1   ((LPC_CCU1_Type *) LPC_CCU1_BASE)

Definition at line 181 of file chip_lpc43xx.h.

#define LPC_CCU1_BASE   0x40051000

Definition at line 102 of file chip_lpc43xx.h.

#define LPC_CCU2   ((LPC_CCU2_Type *) LPC_CCU2_BASE)

Definition at line 182 of file chip_lpc43xx.h.

#define LPC_CCU2_BASE   0x40052000

Definition at line 103 of file chip_lpc43xx.h.

#define LPC_CGU   ((LPC_CGU_T *) LPC_CGU_BASE)

Definition at line 180 of file chip_lpc43xx.h.

#define LPC_CGU_BASE   0x40050000

Definition at line 101 of file chip_lpc43xx.h.

#define LPC_CREG   ((LPC_CREG_T *) LPC_CREG_BASE)

Definition at line 183 of file chip_lpc43xx.h.

#define LPC_CREG_BASE   0x40043000

Definition at line 98 of file chip_lpc43xx.h.

#define LPC_DAC   ((IP_DAC_001_Type *) LPC_DAC_BASE)

Definition at line 209 of file chip_lpc43xx.h.

#define LPC_DAC_BASE   0x400E1000

Definition at line 129 of file chip_lpc43xx.h.

#define LPC_EMC   ((IP_EMC_001_Type *) LPC_EMC_BASE)

Definition at line 170 of file chip_lpc43xx.h.

#define LPC_EMC_BASE   0x40005000

Definition at line 90 of file chip_lpc43xx.h.

#define LPC_ETHERNET   ((IP_ENET_001_Type *) LPC_ETHERNET_BASE)

Definition at line 174 of file chip_lpc43xx.h.

#define LPC_ETHERNET_BASE   0x40010000

Definition at line 94 of file chip_lpc43xx.h.

#define LPC_EVRT   ((LPC_EVRT_Type *) LPC_EVRT_BASE)

Definition at line 178 of file chip_lpc43xx.h.

#define LPC_EVRT_BASE   0x40044000

Definition at line 99 of file chip_lpc43xx.h.

#define LPC_GIMA   ((IP_GIMA_001_Type *) LPC_GIMA_BASE)

Definition at line 208 of file chip_lpc43xx.h.

#define LPC_GIMA_BASE   0x400C7000

Definition at line 128 of file chip_lpc43xx.h.

#define LPC_GPDMA   ((IP_GPDMA_001_Type *) LPC_GPDMA_BASE)

Definition at line 168 of file chip_lpc43xx.h.

#define LPC_GPDMA_BASE   0x40002000

Definition at line 88 of file chip_lpc43xx.h.

#define LPC_GPIO_GROUP_INT0   ((IP_GPIOGROUPINT_001_Type *) LPC_GPIO_GROUP_INT0_BASE)

Definition at line 198 of file chip_lpc43xx.h.

#define LPC_GPIO_GROUP_INT0_BASE   0x40088000

Definition at line 118 of file chip_lpc43xx.h.

#define LPC_GPIO_GROUP_INT1   ((IP_GPIOGROUPINT_001_Type *) LPC_GPIO_GROUP_INT1_BASE)

Definition at line 199 of file chip_lpc43xx.h.

#define LPC_GPIO_GROUP_INT1_BASE   0x40089000

Definition at line 119 of file chip_lpc43xx.h.

#define LPC_GPIO_PIN_INT   ((IP_GPIOPININT_001_Type *) LPC_GPIO_PIN_INT_BASE)

Definition at line 197 of file chip_lpc43xx.h.

#define LPC_GPIO_PIN_INT_BASE   0x40087000

Definition at line 117 of file chip_lpc43xx.h.

#define LPC_GPIO_PORT   ((IP_GPIO_001_Type *) LPC_GPIO_PORT_BASE)

Definition at line 213 of file chip_lpc43xx.h.

#define LPC_GPIO_PORT_BASE   0x400F4000

Definition at line 133 of file chip_lpc43xx.h.

#define LPC_I2C0   ((IP_I2C_001_Type *) LPC_I2C0_BASE)

Definition at line 201 of file chip_lpc43xx.h.

#define LPC_I2C0_BASE   0x400A1000

Definition at line 121 of file chip_lpc43xx.h.

#define LPC_I2C1   ((IP_I2C_001_Type *) LPC_I2C1_BASE)

Definition at line 202 of file chip_lpc43xx.h.

#define LPC_I2C1_BASE   0x400E0000

Definition at line 122 of file chip_lpc43xx.h.

#define LPC_I2S0   ((IP_I2S_001_Type *) LPC_I2S0_BASE)

Definition at line 203 of file chip_lpc43xx.h.

#define LPC_I2S0_BASE   0x400A2000

Definition at line 123 of file chip_lpc43xx.h.

#define LPC_I2S1   ((IP_I2S_001_Type *) LPC_I2S1_BASE)

Definition at line 204 of file chip_lpc43xx.h.

#define LPC_I2S1_BASE   0x400A3000

Definition at line 124 of file chip_lpc43xx.h.

#define LPC_LCD   ((IP_LCD_001_Type *) LPC_LCD_BASE)

Definition at line 173 of file chip_lpc43xx.h.

#define LPC_LCD_BASE   0x40008000

Definition at line 93 of file chip_lpc43xx.h.

#define LPC_MCPWM   ((IP_MCPWM_001_Type *) LPC_MCPWM_BASE)

Definition at line 200 of file chip_lpc43xx.h.

#define LPC_MCPWM_BASE   0x400A0000

Definition at line 120 of file chip_lpc43xx.h.

#define LPC_PMC   ((IP_PMC_001_Type *) LPC_PMC_BASE)

Definition at line 177 of file chip_lpc43xx.h.

#define LPC_PMC_BASE   0x40042000

Definition at line 97 of file chip_lpc43xx.h.

#define LPC_QEI   ((IP_QEI_001_Type *) LPC_QEI_BASE)

Definition at line 207 of file chip_lpc43xx.h.

#define LPC_QEI_BASE   0x400C6000

Definition at line 127 of file chip_lpc43xx.h.

#define LPC_REGFILE   ((IP_REGFILE_001_T *) LPC_REGFILE_BASE)

Definition at line 176 of file chip_lpc43xx.h.

#define LPC_REGFILE_BASE   0x40041000

Definition at line 96 of file chip_lpc43xx.h.

#define LPC_RGU   ((LPC_RGU_T *) LPC_RGU_BASE)

Definition at line 184 of file chip_lpc43xx.h.

#define LPC_RGU_BASE   0x40053000

Definition at line 104 of file chip_lpc43xx.h.

#define LPC_RITIMER   ((IP_RITIMER_001_Type *) LPC_RITIMER_BASE)

Definition at line 206 of file chip_lpc43xx.h.

#define LPC_RITIMER_BASE   0x400C0000

Definition at line 126 of file chip_lpc43xx.h.

#define LPC_RTC   ((IP_RTC_001_T *) LPC_RTC_BASE)

Definition at line 179 of file chip_lpc43xx.h.

#define LPC_RTC_BASE   0x40046000

Definition at line 100 of file chip_lpc43xx.h.

#define LPC_SCT   ((IP_SCT_001_Type *) LPC_SCT_BASE)

Definition at line 167 of file chip_lpc43xx.h.

#define LPC_SCT_BASE   0x40000000

Definition at line 87 of file chip_lpc43xx.h.

#define LPC_SCU   ((LPC_SCU_Type *) LPC_SCU_BASE)

Definition at line 196 of file chip_lpc43xx.h.

#define LPC_SCU_BASE   0x40086000

Definition at line 116 of file chip_lpc43xx.h.

#define LPC_SDMMC   ((IP_SDMMC_001_Type *) LPC_SDMMC_BASE)

Definition at line 169 of file chip_lpc43xx.h.

#define LPC_SDMMC_BASE   0x40004000

Definition at line 89 of file chip_lpc43xx.h.

#define LPC_SGPIO   ((IP_SGPIO_001_Type *) LPC_SGPIO_BASE)

Definition at line 215 of file chip_lpc43xx.h.

#define LPC_SGPIO_BASE   0x40101000

Definition at line 135 of file chip_lpc43xx.h.

#define LPC_SPI   ((IP_SPI_001_Type *) LPC_SPI_BASE)

Definition at line 214 of file chip_lpc43xx.h.

#define LPC_SPI_BASE   0x40100000

Definition at line 134 of file chip_lpc43xx.h.

#define LPC_SSP0   ((IP_SSP_001_Type *) LPC_SSP0_BASE)

Definition at line 190 of file chip_lpc43xx.h.

#define LPC_SSP0_BASE   0x40083000

Definition at line 110 of file chip_lpc43xx.h.

#define LPC_SSP1   ((IP_SSP_001_Type *) LPC_SSP1_BASE)

Definition at line 191 of file chip_lpc43xx.h.

#define LPC_SSP1_BASE   0x400C5000

Definition at line 111 of file chip_lpc43xx.h.

#define LPC_TIMER0   ((IP_TIMER_001_Type *) LPC_TIMER0_BASE)

Definition at line 192 of file chip_lpc43xx.h.

#define LPC_TIMER0_BASE   0x40084000

Definition at line 112 of file chip_lpc43xx.h.

#define LPC_TIMER1   ((IP_TIMER_001_Type *) LPC_TIMER1_BASE)

Definition at line 193 of file chip_lpc43xx.h.

#define LPC_TIMER1_BASE   0x40085000

Definition at line 113 of file chip_lpc43xx.h.

#define LPC_TIMER2   ((IP_TIMER_001_Type *) LPC_TIMER2_BASE)

Definition at line 194 of file chip_lpc43xx.h.

#define LPC_TIMER2_BASE   0x400C3000

Definition at line 114 of file chip_lpc43xx.h.

#define LPC_TIMER3   ((IP_TIMER_001_Type *) LPC_TIMER3_BASE)

Definition at line 195 of file chip_lpc43xx.h.

#define LPC_TIMER3_BASE   0x400C4000

Definition at line 115 of file chip_lpc43xx.h.

#define LPC_UART1   ((IP_USART_001_Type *) LPC_UART1_BASE)

Definition at line 189 of file chip_lpc43xx.h.

#define LPC_UART1_BASE   0x40082000

Definition at line 109 of file chip_lpc43xx.h.

#define LPC_USART0   ((IP_USART_001_Type *) LPC_USART0_BASE)

Definition at line 186 of file chip_lpc43xx.h.

#define LPC_USART0_BASE   0x40081000

Definition at line 106 of file chip_lpc43xx.h.

#define LPC_USART2   ((IP_USART_001_Type *) LPC_USART2_BASE)

Definition at line 187 of file chip_lpc43xx.h.

#define LPC_USART2_BASE   0x400C1000

Definition at line 107 of file chip_lpc43xx.h.

#define LPC_USART3   ((IP_USART_001_Type *) LPC_USART3_BASE)

Definition at line 188 of file chip_lpc43xx.h.

#define LPC_USART3_BASE   0x400C2000

Definition at line 108 of file chip_lpc43xx.h.

#define LPC_USB0   ((IP_USBHS_001_Type *) LPC_USB0_BASE)

Definition at line 171 of file chip_lpc43xx.h.

#define LPC_USB0_BASE   0x40006000

Definition at line 91 of file chip_lpc43xx.h.

#define LPC_USB1   ((IP_USBHS_001_Type *) LPC_USB1_BASE)

Definition at line 172 of file chip_lpc43xx.h.

#define LPC_USB1_BASE   0x40007000

Definition at line 92 of file chip_lpc43xx.h.

#define LPC_WWDT   ((IP_WWDT_001_Type *) LPC_WWDT_BASE)

Definition at line 185 of file chip_lpc43xx.h.

#define LPC_WWDT_BASE   0x40080000

Definition at line 105 of file chip_lpc43xx.h.

Typedef Documentation

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