LPCOpen Platform
LPCOpen Platform for NXP LPC Microcontrollers
 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
CHIP: LPC18xx/43xx SSP driver

Data Structures

struct  SSP_ConfigFormat
 
struct  SPI_Address_t
 
struct  Chip_SSP_DATA_SETUP_Type
 

Macros

#define SSP_CPHA_FIRST   SSP_CR0_CPHA_FIRST
 
#define SSP_CPHA_SECOND   SSP_CR0_CPHA_SECOND
 
#define SSP_CPOL_HI   SSP_CR0_CPOL_LO
 
#define SSP_CPOL_LO   SSP_CR0_CPOL_HI
 
#define SSP_SLAVE_MODE   SSP_CR1_SLAVE_EN
 
#define SSP_MASTER_MODE   SSP_CR1_MASTER_EN
 

Enumerations

enum  SSP_ClockFormat {
  SSP_CLOCK_CPHA0_CPOL0 = (0 << 6), SSP_CLOCK_CPHA0_CPOL1 = (1u << 6), SSP_CLOCK_CPHA1_CPOL0 = (2u << 6), SSP_CLOCK_CPHA1_CPOL1 = (3u << 6),
  SSP_CLOCK_MODE0 = SSP_CLOCK_CPHA0_CPOL0, SSP_CLOCK_MODE1 = SSP_CLOCK_CPHA1_CPOL0, SSP_CLOCK_MODE2 = SSP_CLOCK_CPHA0_CPOL1, SSP_CLOCK_MODE3 = SSP_CLOCK_CPHA1_CPOL1
}
 
enum  SSP_FrameFormat { SSP_FRAMEFORMAT_SPI = (0 << 4), SSP_FRAMEFORMAT_TI = (1u << 4), SSP_FRAMEFORMAT_MICROWIRE = (2u << 4) }
 
enum  SSP_Bits {
  SSP_BITS_4 = (3u << 0), SSP_BITS_5 = (4u << 0), SSP_BITS_6 = (5u << 0), SSP_BITS_7 = (6u << 0),
  SSP_BITS_8 = (7u << 0), SSP_BITS_9 = (8u << 0), SSP_BITS_10 = (9u << 0), SSP_BITS_11 = (10u << 0),
  SSP_BITS_12 = (11u << 0), SSP_BITS_13 = (12u << 0), SSP_BITS_14 = (13u << 0), SSP_BITS_15 = (14u << 0),
  SSP_BITS_16 = (15u << 0)
}
 
enum  SSP_Mode { SSP_MODE_MASTER = (0 << 2), SSP_MODE_SLAVE = (1u << 2) }
 

Functions

STATIC INLINE FlagStatus Chip_SSP_GetStatus (LPC_SSP_Type *pSSP, SSP_Status_Type Stat)
 Get the current status of SSP controller.
 
STATIC INLINE void Chip_SSP_Cmd (LPC_SSP_Type *pSSP, FunctionalState NewState)
 Enable/Disable SSP operation.
 
STATIC INLINE void Chip_SSP_DeInit (LPC_SSP_Type *pSSP)
 Disable SSP operation.
 
STATIC INLINE void Chip_SSP_LoopBackCmd (LPC_SSP_Type *pSSP, FunctionalState NewState)
 Enable/Disable loopback mode.
 
void Chip_SSP_Int_FlushData (LPC_SSP_Type *pSSP)
 Clean all data in RX FIFO of SSP.
 
Status Chip_SSP_Int_RWFrames8Bits (LPC_SSP_Type *pSSP, Chip_SSP_DATA_SETUP_Type *xf_setup)
 SSP Interrupt Read/Write with 8-bit frame width.
 
Status Chip_SSP_Int_RWFrames16Bits (LPC_SSP_Type *pSSP, Chip_SSP_DATA_SETUP_Type *xf_setup)
 SSP Interrupt Read/Write with 16-bit frame width.
 
uint32_t Chip_SSP_RWFrames_Blocking (LPC_SSP_Type *pSSP, Chip_SSP_DATA_SETUP_Type *xf_setup)
 SSP Polling Read/Write in blocking mode.
 
uint32_t Chip_SSP_WriteFrames_Blocking (LPC_SSP_Type *pSSP, uint8_t *buffer, uint32_t buffer_len)
 SSP Polling Write in blocking mode.
 
uint32_t Chip_SSP_ReadFrames_Blocking (LPC_SSP_Type *pSSP, uint8_t *buffer, uint32_t buffer_len)
 Note here.
 
void Chip_SSP_Init (LPC_SSP_Type *pSSP)
 Initialize the SSP.
 
void Chip_SSP_Set_Master (LPC_SSP_Type *pSSP, bool master)
 Set the SSP operating modes, master or slave.
 
void Chip_SSP_Set_BitRate (LPC_SSP_Type *pSSP, uint32_t bit_rate)
 Set the clock frequency for SSP interface.
 
void Chip_SSP_Set_Format (LPC_SSP_Type *pSSP, SSP_ConfigFormat *format)
 Set up the SSP frame format.
 
void Chip_SSP_Int_Cmd (LPC_SSP_Type *pSSP, FunctionalState NewState)
 Enable/Disable SSP interrupt.
 
void Chip_SSP_DMA_Cmd (LPC_SSP_Type *pSSP, FunctionalState NewState)
 Enable/Disable DMA.
 

Detailed Description

Macro Definition Documentation

#define SSP_CPHA_FIRST   SSP_CR0_CPHA_FIRST

SSP configuration parameter defines Clock phase control bit

Definition at line 126 of file ssp_18xx_43xx.h.

#define SSP_CPHA_SECOND   SSP_CR0_CPHA_SECOND

Definition at line 127 of file ssp_18xx_43xx.h.

#define SSP_CPOL_HI   SSP_CR0_CPOL_LO

Clock polarity control bit

Definition at line 136 of file ssp_18xx_43xx.h.

#define SSP_CPOL_LO   SSP_CR0_CPOL_HI

Definition at line 137 of file ssp_18xx_43xx.h.

#define SSP_MASTER_MODE   SSP_CR1_MASTER_EN

Definition at line 141 of file ssp_18xx_43xx.h.

#define SSP_SLAVE_MODE   SSP_CR1_SLAVE_EN

SSP master mode enable

Definition at line 140 of file ssp_18xx_43xx.h.

Enumeration Type Documentation

enum SSP_Bits
Enumerator:
SSP_BITS_4 

4 bits/frame

SSP_BITS_5 

5 bits/frame

SSP_BITS_6 

6 bits/frame

SSP_BITS_7 

7 bits/frame

SSP_BITS_8 

8 bits/frame

SSP_BITS_9 

9 bits/frame

SSP_BITS_10 

10 bits/frame

SSP_BITS_11 

11 bits/frame

SSP_BITS_12 

12 bits/frame

SSP_BITS_13 

13 bits/frame

SSP_BITS_14 

14 bits/frame

SSP_BITS_15 

15 bits/frame

SSP_BITS_16 

16 bits/frame

Definition at line 72 of file ssp_18xx_43xx.h.

Enumerator:
SSP_CLOCK_CPHA0_CPOL0 

CPHA = 0, CPOL = 0

SSP_CLOCK_CPHA0_CPOL1 

CPHA = 0, CPOL = 1

SSP_CLOCK_CPHA1_CPOL0 

CPHA = 1, CPOL = 0

SSP_CLOCK_CPHA1_CPOL1 

CPHA = 1, CPOL = 1

SSP_CLOCK_MODE0 

alias

SSP_CLOCK_MODE1 

alias

SSP_CLOCK_MODE2 

alias

SSP_CLOCK_MODE3 

alias

Definition at line 49 of file ssp_18xx_43xx.h.

Enumerator:
SSP_FRAMEFORMAT_SPI 

Frame format: SPI

SSP_FRAMEFORMAT_TI 

Frame format: TI SSI

SSP_FRAMEFORMAT_MICROWIRE 

Frame format: Microwire

Definition at line 63 of file ssp_18xx_43xx.h.

enum SSP_Mode
Enumerator:
SSP_MODE_MASTER 

Master mode

SSP_MODE_SLAVE 

Slave mode

Definition at line 100 of file ssp_18xx_43xx.h.

Function Documentation

STATIC INLINE void Chip_SSP_Cmd ( LPC_SSP_Type pSSP,
FunctionalState  NewState 
)

Enable/Disable SSP operation.

Parameters
pSSP: The base of SSP peripheral on the chip
NewState: New state, ENABLE or DISABLE
Returns
Nothing

Definition at line 165 of file ssp_18xx_43xx.h.

STATIC INLINE void Chip_SSP_DeInit ( LPC_SSP_Type pSSP)

Disable SSP operation.

Parameters
pSSP: The base of SSP peripheral on the chip
Returns
Nothing The SSP controller is disabled

Definition at line 176 of file ssp_18xx_43xx.h.

void Chip_SSP_DMA_Cmd ( LPC_SSP_Type pSSP,
FunctionalState  NewState 
)

Enable/Disable DMA.

Parameters
pSSP: The base SSP peripheral on the chip
NewState: ENABLE or DISABLE DMA
Returns
Nothing

Definition at line 422 of file ssp_18xx_43xx.c.

STATIC INLINE FlagStatus Chip_SSP_GetStatus ( LPC_SSP_Type pSSP,
SSP_Status_Type  Stat 
)

Get the current status of SSP controller.

Parameters
pSSP: The base of SSP peripheral on the chip
Stat: Type of status, should be :
  • SSP_STAT_TFE
  • SSP_STAT_TNF
  • SSP_STAT_RNE
  • SSP_STAT_RFF
  • SSP_STAT_BSY
Returns
SSP controller status, SET or RESET

Definition at line 154 of file ssp_18xx_43xx.h.

void Chip_SSP_Init ( LPC_SSP_Type pSSP)

Initialize the SSP.

Parameters
pSSP: The base SSP peripheral on the chip
Returns
Nothing

Definition at line 429 of file ssp_18xx_43xx.c.

void Chip_SSP_Int_Cmd ( LPC_SSP_Type pSSP,
FunctionalState  NewState 
)

Enable/Disable SSP interrupt.

Parameters
pSSP: The base SSP peripheral on the chip
NewState: ENABLE or DISABLE interrupt
Returns
Nothing

Definition at line 416 of file ssp_18xx_43xx.c.

void Chip_SSP_Int_FlushData ( LPC_SSP_Type pSSP)

Clean all data in RX FIFO of SSP.

Parameters
pSSP: The base SSP peripheral on the chip
Returns
Nothing

Definition at line 289 of file ssp_18xx_43xx.c.

Status Chip_SSP_Int_RWFrames16Bits ( LPC_SSP_Type pSSP,
Chip_SSP_DATA_SETUP_Type xf_setup 
)

SSP Interrupt Read/Write with 16-bit frame width.

Parameters
pSSP: The base SSP peripheral on the chip
xf_setup: Pointer to a SSP_DATA_SETUP_Type structure that contains specified information about transmit/receive data configuration
Returns
SUCCESS or ERROR

Definition at line 337 of file ssp_18xx_43xx.c.

Status Chip_SSP_Int_RWFrames8Bits ( LPC_SSP_Type pSSP,
Chip_SSP_DATA_SETUP_Type xf_setup 
)

SSP Interrupt Read/Write with 8-bit frame width.

Parameters
pSSP: The base SSP peripheral on the chip
xf_setup: Pointer to a SSP_DATA_SETUP_Type structure that contains specified information about transmit/receive data configuration
Returns
SUCCESS or ERROR

Definition at line 305 of file ssp_18xx_43xx.c.

STATIC INLINE void Chip_SSP_LoopBackCmd ( LPC_SSP_Type pSSP,
FunctionalState  NewState 
)

Enable/Disable loopback mode.

Parameters
pSSP: The base of SSP peripheral on the chip
NewState: New state, ENABLE or DISABLE
Returns
Nothing Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin

Definition at line 189 of file ssp_18xx_43xx.h.

uint32_t Chip_SSP_ReadFrames_Blocking ( LPC_SSP_Type pSSP,
uint8_t *  buffer,
uint32_t  buffer_len 
)

Note here.

Parameters
pSSP: The base SSP peripheral on the chip
buffer: Buffer address
buffer_len: The length of buffer
Returns
Actual data length has been transferred

This function can be used in both master and slave mode. First, a dummy writing operation is generated to clear data buffer. After that, a reading operation will receive the needed data

Definition at line 220 of file ssp_18xx_43xx.c.

uint32_t Chip_SSP_RWFrames_Blocking ( LPC_SSP_Type pSSP,
Chip_SSP_DATA_SETUP_Type xf_setup 
)

SSP Polling Read/Write in blocking mode.

Parameters
pSSP: The base SSP peripheral on the chip
xf_setup: Pointer to a SSP_DATA_SETUP_Type structure that contains specified information about transmit/receive data configuration
Returns
Actual data length has been transferred

This function can be used in both master and slave mode. It starts with writing phase and after that, a reading phase is generated to read any data available in RX_FIFO. All needed information is prepared through xf_setup param.

Definition at line 88 of file ssp_18xx_43xx.c.

void Chip_SSP_Set_BitRate ( LPC_SSP_Type pSSP,
uint32_t  bit_rate 
)

Set the clock frequency for SSP interface.

Parameters
pSSP: The base SSP peripheral on the chip
bit_rate: The SSP bit rate
Returns
Nothing

Definition at line 380 of file ssp_18xx_43xx.c.

void Chip_SSP_Set_Format ( LPC_SSP_Type pSSP,
SSP_ConfigFormat format 
)

Set up the SSP frame format.

Parameters
pSSP: The base SSP peripheral on the chip
format: Structure used to format frame
Returns
Nothing

Definition at line 410 of file ssp_18xx_43xx.c.

void Chip_SSP_Set_Master ( LPC_SSP_Type pSSP,
bool  master 
)

Set the SSP operating modes, master or slave.

Parameters
pSSP: The base SSP peripheral on the chip
master: 1 to set master, 0 to set slave
Returns
Nothing

Definition at line 369 of file ssp_18xx_43xx.c.

uint32_t Chip_SSP_WriteFrames_Blocking ( LPC_SSP_Type pSSP,
uint8_t *  buffer,
uint32_t  buffer_len 
)

SSP Polling Write in blocking mode.

Parameters
pSSP: The base SSP peripheral on the chip
buffer: Buffer address
buffer_len: Buffer length
Returns
Actual data length has been transferred

This function can be used in both master and slave mode. First, a writing operation will send the needed data. After that, a dummy reading operation is generated to clear data buffer

Definition at line 151 of file ssp_18xx_43xx.c.