|
#define | MMC_GO_IDLE_STATE 0 /* bc */ |
|
#define | MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ |
|
#define | MMC_ALL_SEND_CID 2 /* bcr R2 */ |
|
#define | MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ |
|
#define | MMC_SET_DSR 4 /* bc [31:16] RCA */ |
|
#define | MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ |
|
#define | MMC_SEND_EXT_CSD 8 /* bc R1 */ |
|
#define | MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ |
|
#define | MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ |
|
#define | MMC_STOP_TRANSMISSION 12 /* ac R1b */ |
|
#define | MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ |
|
#define | MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ |
|
#define | MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ |
|
#define | MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ |
|
#define | MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ |
|
#define | MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ |
|
#define | MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ |
|
#define | MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ |
|
#define | MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ |
|
#define | MMC_PROGRAM_CID 26 /* adtc R1 */ |
|
#define | MMC_PROGRAM_CSD 27 /* adtc R1 */ |
|
#define | MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ |
|
#define | MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ |
|
#define | MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ |
|
#define | MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ |
|
#define | MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ |
|
#define | MMC_ERASE 37 /* ac R1b */ |
|
#define | MMC_FAST_IO 39 /* ac <Complex> R4 */ |
|
#define | MMC_GO_IRQ_STATE 40 /* bcr R5 */ |
|
#define | MMC_LOCK_UNLOCK 42 /* adtc R1b */ |
|
#define | MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ |
|
#define | MMC_GEN_CMD 56 /* adtc [0] RD/WR R1b */ |
|
#define | SD_SEND_RELATIVE_ADDR 3 /* ac R6 */ |
|
#define | SD_CMD8 8 /* bcr [31:0] OCR R3 */ |
|
#define | SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ |
|
#define | SD_APP_OP_COND 41 /* bcr [31:0] OCR R1 (R4) */ |
|
#define | SD_APP_SEND_SCR 51 /* adtc R1 */ |
|
#define | R1_OUT_OF_RANGE (1UL << 31) /* er, c */ |
|
#define | R1_ADDRESS_ERROR (1 << 30) /* erx, c */ |
|
#define | R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ |
|
#define | R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ |
|
#define | R1_ERASE_PARAM (1 << 27) /* ex, c */ |
|
#define | R1_WP_VIOLATION (1 << 26) /* erx, c */ |
|
#define | R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ |
|
#define | R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ |
|
#define | R1_COM_CRC_ERROR (1 << 23) /* er, b */ |
|
#define | R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ |
|
#define | R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ |
|
#define | R1_CC_ERROR (1 << 20) /* erx, c */ |
|
#define | R1_ERROR (1 << 19) /* erx, c */ |
|
#define | R1_UNDERRUN (1 << 18) /* ex, c */ |
|
#define | R1_OVERRUN (1 << 17) /* ex, c */ |
|
#define | R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ |
|
#define | R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ |
|
#define | R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ |
|
#define | R1_ERASE_RESET (1 << 13) /* sr, c */ |
|
#define | R1_STATUS(x) (x & 0xFFFFE000) |
|
#define | R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ |
|
#define | R1_READY_FOR_DATA (1 << 8)/* sx, a */ |
|
#define | R1_APP_CMD (1 << 5)/* sr, c */ |
|
#define | OCR_ALL_READY (1UL << 31) /* Card Power up status bit */ |
|
#define | OCR_HC_CCS (1 << 30) /* High capacity card */ |
|
#define | OCR_VOLTAGE_RANGE_MSK 0x00ff8000 |
|
#define | SD_SEND_IF_ARG 0x000001AA |
|
#define | SD_SEND_IF_ECHO_MSK 0x000000FF |
|
#define | SD_SEND_IF_RESP 0x000000AA |
|
#define | CMD_MASK_RESP (0x3UL << 28) |
|
#define | CMD_RESP(r) (((r) & 0x3) << 28) |
|
#define | CMD_RESP_R0 (0 << 28) |
|
#define | CMD_RESP_R1 (1 << 28) |
|
#define | CMD_RESP_R2 (2 << 28) |
|
#define | CMD_RESP_R3 (3 << 28) |
|
#define | CMD_BIT_AUTO_STOP (1 << 24) |
|
#define | CMD_BIT_APP (1 << 23) |
|
#define | CMD_BIT_INIT (1 << 22) |
|
#define | CMD_BIT_BUSY (1 << 21) |
|
#define | CMD_BIT_LS (1 << 20) /* Low speed, used during acquire */ |
|
#define | CMD_BIT_DATA (1 << 19) |
|
#define | CMD_BIT_WRITE (1 << 18) |
|
#define | CMD_BIT_STREAM (1 << 17) |
|
#define | CMD_MASK_CMD (0xff) |
|
#define | CMD_SHIFT_CMD (0) |
|
#define | CMD(c, r) ( ((c) & CMD_MASK_CMD) | CMD_RESP((r)) ) |
|
#define | CMD_IDLE CMD(MMC_GO_IDLE_STATE, 0) | CMD_BIT_LS | CMD_BIT_INIT |
|
#define | CMD_SD_OP_COND CMD(SD_APP_OP_COND, 1) | CMD_BIT_LS | CMD_BIT_APP |
|
#define | CMD_SD_SEND_IF_COND CMD(SD_CMD8, 1) | CMD_BIT_LS |
|
#define | CMD_MMC_OP_COND CMD(MMC_SEND_OP_COND, 3) | CMD_BIT_LS | CMD_BIT_INIT |
|
#define | CMD_ALL_SEND_CID CMD(MMC_ALL_SEND_CID, 2) | CMD_BIT_LS |
|
#define | CMD_MMC_SET_RCA CMD(MMC_SET_RELATIVE_ADDR, 1) | CMD_BIT_LS |
|
#define | CMD_SD_SEND_RCA CMD(SD_SEND_RELATIVE_ADDR, 1) | CMD_BIT_LS |
|
#define | CMD_SEND_CSD CMD(MMC_SEND_CSD, 2) | CMD_BIT_LS |
|
#define | CMD_SEND_EXT_CSD CMD(MMC_SEND_EXT_CSD, 1) | CMD_BIT_LS | CMD_BIT_DATA |
|
#define | CMD_DESELECT_CARD CMD(MMC_SELECT_CARD, 0) |
|
#define | CMD_SELECT_CARD CMD(MMC_SELECT_CARD, 1) |
|
#define | CMD_SET_BLOCKLEN CMD(MMC_SET_BLOCKLEN, 1) |
|
#define | CMD_SEND_STATUS CMD(MMC_SEND_STATUS, 1) |
|
#define | CMD_READ_SINGLE CMD(MMC_READ_SINGLE_BLOCK, 1) | CMD_BIT_DATA |
|
#define | CMD_READ_MULTIPLE CMD(MMC_READ_MULTIPLE_BLOCK, 1) | CMD_BIT_DATA | CMD_BIT_AUTO_STOP |
|
#define | CMD_SD_SET_WIDTH CMD(SD_APP_SET_BUS_WIDTH, 1) | CMD_BIT_APP |
|
#define | CMD_STOP CMD(MMC_STOP_TRANSMISSION, 1) | CMD_BIT_BUSY |
|
#define | CMD_WRITE_SINGLE CMD(MMC_WRITE_BLOCK, 1) | CMD_BIT_DATA | CMD_BIT_WRITE |
|
#define | CMD_WRITE_MULTIPLE CMD(MMC_WRITE_MULTIPLE_BLOCK, 1) | CMD_BIT_DATA | CMD_BIT_WRITE | CMD_BIT_AUTO_STOP |
|
#define | CARD_TYPE_SD (1 << 0) |
| card type defines
|
|
#define | CARD_TYPE_4BIT (1 << 1) |
|
#define | CARD_TYPE_8BIT (1 << 2) |
|
#define | CARD_TYPE_HC (OCR_HC_CCS) |
|
#define | MMC_SECTOR_SIZE 512 |
|
#define | US_TIMEOUT 1000000 |
| Setup options for the SDIO driver.
|
|
#define | MS_ACQUIRE_DELAY (10) |
|
#define | INIT_OP_RETRIES 50 |
|
#define | SET_OP_RETRIES 1000 |
|
#define | SDIO_BUS_WIDTH 4 |
|
#define | SD_MMC_ENUM_CLOCK 400000 |
|
#define | MMC_MAX_CLOCK 20000000 |
|
#define | MMC_LOW_BUS_MAX_CLOCK 26000000 |
|
#define | MMC_HIGH_BUS_MAX_CLOCK 52000000 |
|
#define | SD_MAX_CLOCK 25000000 |
|