LPCOpen Platform
LPCOpen Platform for NXP LPC Microcontrollers
Main Page
Related Pages
Modules
Data Structures
Files
File List
Globals
All
Data Structures
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Macros
Groups
Pages
enet_001.h
Go to the documentation of this file.
1
/*
2
* @brief Ethernet control functions
3
*
4
* @note
5
* Copyright(C) NXP Semiconductors, 2012
6
* All rights reserved.
7
*
8
* @par
9
* Software that is described herein is for illustrative purposes only
10
* which provides customers with programming information regarding the
11
* LPC products. This software is supplied "AS IS" without any warranties of
12
* any kind, and NXP Semiconductors and its licensor disclaim any and
13
* all warranties, express or implied, including all implied warranties of
14
* merchantability, fitness for a particular purpose and non-infringement of
15
* intellectual property rights. NXP Semiconductors assumes no responsibility
16
* or liability for the use of the software, conveys no license or rights under any
17
* patent, copyright, mask work right, or any other intellectual property rights in
18
* or to any products. NXP Semiconductors reserves the right to make changes
19
* in the software without notification. NXP Semiconductors also makes no
20
* representation or warranty that such application will be suitable for the
21
* specified use without further testing or modification.
22
*
23
* @par
24
* Permission to use, copy, modify, and distribute this software and its
25
* documentation is hereby granted, under NXP Semiconductors' and its
26
* licensor's relevant copyrights in the software, without fee, provided that it
27
* is used in conjunction with NXP Semiconductors microcontrollers. This
28
* copyright, permission, and disclaimer notice must appear in all copies of
29
* this code.
30
*/
31
32
#ifndef __ENET_001_H_
33
#define __ENET_001_H_
34
35
#include "sys_config.h"
36
#include "
cmsis.h
"
37
38
#ifdef __cplusplus
39
extern
"C"
{
40
#endif
41
50
typedef
struct
{
51
__IO
uint32_t
MAC_CONFIG
;
52
__IO
uint32_t
MAC_FRAME_FILTER
;
53
__IO
uint32_t
MAC_HASHTABLE_HIGH
;
54
__IO
uint32_t
MAC_HASHTABLE_LOW
;
55
__IO
uint32_t
MAC_MII_ADDR
;
56
__IO
uint32_t
MAC_MII_DATA
;
57
__IO
uint32_t
MAC_FLOW_CTRL
;
58
__IO
uint32_t
MAC_VLAN_TAG
;
59
__I
uint32_t
RESERVED0
;
60
__I
uint32_t
MAC_DEBUG
;
61
__IO
uint32_t
MAC_RWAKE_FRFLT
;
62
__IO
uint32_t
MAC_PMT_CTRL_STAT
;
63
__I
uint32_t
RESERVED1[2];
64
__I
uint32_t
MAC_INTR
;
65
__IO
uint32_t
MAC_INTR_MASK
;
66
__IO
uint32_t
MAC_ADDR0_HIGH
;
67
__IO
uint32_t
MAC_ADDR0_LOW
;
68
__I
uint32_t
RESERVED2[430];
69
__IO
uint32_t
MAC_TIMESTP_CTRL
;
70
__IO
uint32_t
SUBSECOND_INCR
;
71
__I
uint32_t
SECONDS
;
72
__I
uint32_t
NANOSECONDS
;
73
__IO
uint32_t
SECONDSUPDATE
;
74
__IO
uint32_t
NANOSECONDSUPDATE
;
75
__IO
uint32_t
ADDEND
;
76
__IO
uint32_t
TARGETSECONDS
;
77
__IO
uint32_t
TARGETNANOSECONDS
;
78
__IO
uint32_t
HIGHWORD
;
79
__I
uint32_t
TIMESTAMPSTAT
;
80
__IO
uint32_t
PPSCTRL
;
81
__I
uint32_t
AUXNANOSECONDS
;
82
__I
uint32_t
AUXSECONDS
;
83
__I
uint32_t
RESERVED3[562];
84
__IO
uint32_t
DMA_BUS_MODE
;
85
__IO
uint32_t
DMA_TRANS_POLL_DEMAND
;
86
__IO
uint32_t
DMA_REC_POLL_DEMAND
;
87
__IO
uint32_t
DMA_REC_DES_ADDR
;
88
__IO
uint32_t
DMA_TRANS_DES_ADDR
;
89
__IO
uint32_t
DMA_STAT
;
90
__IO
uint32_t
DMA_OP_MODE
;
91
__IO
uint32_t
DMA_INT_EN
;
92
__I
uint32_t
DMA_MFRM_BUFOF
;
93
__IO
uint32_t
DMA_REC_INT_WDT
;
94
__I
uint32_t
RESERVED4[8];
95
__I
uint32_t
DMA_CURHOST_TRANS_DES
;
96
__I
uint32_t
DMA_CURHOST_REC_DES
;
97
__I
uint32_t
DMA_CURHOST_TRANS_BUF
;
98
__I
uint32_t
DMA_CURHOST_REC_BUF
;
99
}
IP_ENET_001_Type
;
100
104
#define MAC_CFG_RE (1 << 2)
105
#define MAC_CFG_TE (1 << 3)
106
#define MAC_CFG_DF (1 << 4)
107
#define MAC_CFG_BL(n) ((n) << 5)
108
#define MAC_CFG_ACS (1 << 7)
109
#define MAC_CFG_LUD (1 << 8)
110
#define MAC_CFG_DR (1 << 9)
111
#define MAC_CFG_IPC (1 << 10)
112
#define MAC_CFG_DM (1 << 11)
113
#define MAC_CFG_LM (1 << 12)
114
#define MAC_CFG_DO (1 << 13)
115
#define MAC_CFG_FES (1 << 14)
116
#define MAC_CFG_PS (1 << 15)
117
#define MAC_CFG_DCRS (1 << 16)
118
#define MAC_CFG_IFG(n) ((n) << 17)
119
#define MAC_CFG_JE (1 << 20)
120
#define MAC_CFG_JD (1 << 22)
121
#define MAC_CFG_WD (1 << 23)
126
#define MAC_FF_PR (1 << 0)
127
#define MAC_FF_DAIF (1 << 3)
128
#define MAC_FF_PM (1 << 4)
129
#define MAC_FF_DBF (1 << 5)
130
#define MAC_FF_PCF(n) ((n) << 6)
131
#define MAC_FF_SAIF (1 << 8)
132
#define MAC_FF_SAF (1 << 9)
133
#define MAC_FF_RA (1UL << 31)
138
#define MAC_MIIA_GB (1 << 0)
139
#define MAC_MIIA_W (1 << 1)
140
#define MAC_MIIA_CR(n) ((n) << 2)
141
#define MAC_MIIA_GR(n) ((n) << 6)
142
#define MAC_MIIA_PA(n) ((n) << 11)
147
#define MAC_MIID_GDMSK (0xFFFF)
152
#define MAC_FC_FCB (1 << 0)
153
#define MAC_FC_TFE (1 << 1)
154
#define MAC_FC_RFE (1 << 2)
155
#define MAC_FC_UP (1 << 3)
156
#define MAC_FC_PLT(n) ((n) << 4)
157
#define MAC_FC_DZPQ (1 << 7)
158
#define MAC_FC_PT(n) ((n) << 16)
163
#define MAC_VT_VL(n) ((n) << 0)
164
#define MAC_VT_ETC (1 << 7)
169
#define MAC_PMT_PD (1 << 0)
170
#define MAC_PMT_MPE (1 << 1)
171
#define MAC_PMT_WFE (1 << 2)
172
#define MAC_PMT_MPR (1 << 5)
173
#define MAC_PMT_WFR (1 << 6)
174
#define MAC_PMT_GU (1 << 9)
175
#define MAC_PMT_WFFRPR (1UL << 31)
180
#define MAC_IM_PMT (1 << 3)
185
#define MAC_ADRH_MO (1UL << 31)
190
#define MAC_ADRH_MO (1UL << 31)
195
#define MAC_TS_TSENA (1 << 0)
196
#define MAC_TS_TSCFUP (1 << 1)
197
#define MAC_TS_TSINIT (1 << 2)
198
#define MAC_TS_TSUPDT (1 << 3)
199
#define MAC_TS_TSTRIG (1 << 4)
200
#define MAC_TS_TSADDR (1 << 5)
201
#define MAC_TS_TSENAL (1 << 8)
202
#define MAC_TS_TSCTRL (1 << 9)
203
#define MAC_TS_TSVER2 (1 << 10)
204
#define MAC_TS_TSIPENA (1 << 11)
205
#define MAC_TS_TSIPV6E (1 << 12)
206
#define MAC_TS_TSIPV4E (1 << 13)
207
#define MAC_TS_TSEVNT (1 << 14)
208
#define MAC_TS_TSMSTR (1 << 15)
209
#define MAC_TS_TSCLKT(n) ((n) << 16)
210
#define MAC_TS_TSENMA (1 << 18)
215
#define DMA_BM_SWR (1 << 0)
216
#define DMA_BM_DA (1 << 1)
217
#define DMA_BM_DSL(n) ((n) << 2)
218
#define DMA_BM_ATDS (1 << 7)
219
#define DMA_BM_PBL(n) ((n) << 8)
220
#define DMA_BM_PR(n) ((n) << 14)
221
#define DMA_BM_FB (1 << 16)
222
#define DMA_BM_RPBL(n) ((n) << 17)
223
#define DMA_BM_USP (1 << 23)
224
#define DMA_BM_PBL8X (1 << 24)
225
#define DMA_BM_AAL (1 << 25)
226
#define DMA_BM_MB (1 << 26)
227
#define DMA_BM_TXPR (1 << 27)
232
#define DMA_ST_TI (1 << 0)
233
#define DMA_ST_TPS (1 << 1)
234
#define DMA_ST_TU (1 << 2)
235
#define DMA_ST_TJT (1 << 3)
236
#define DMA_ST_OVF (1 << 4)
237
#define DMA_ST_UNF (1 << 5)
238
#define DMA_ST_RI (1 << 6)
239
#define DMA_ST_RU (1 << 7)
240
#define DMA_ST_RPS (1 << 8)
241
#define DMA_ST_RWT (1 << 9)
242
#define DMA_ST_ETI (1 << 10)
243
#define DMA_ST_FBI (1 << 13)
244
#define DMA_ST_ERI (1 << 14)
245
#define DMA_ST_AIE (1 << 15)
246
#define DMA_ST_NIS (1 << 16)
247
#define DMA_ST_ALL (0x1E7FF)
252
#define DMA_OM_SR (1 << 1)
253
#define DMA_OM_OSF (1 << 2)
254
#define DMA_OM_RTC(n) ((n) << 3)
255
#define DMA_OM_FUF (1 << 6)
256
#define DMA_OM_FEF (1 << 7)
257
#define DMA_OM_ST (1 << 13)
258
#define DMA_OM_TTC(n) ((n) << 14)
259
#define DMA_OM_FTF (1 << 20)
260
#define DMA_OM_TSF (1 << 21)
261
#define DMA_OM_DFF (1 << 24)
262
#define DMA_OM_RSF (1 << 25)
263
#define DMA_OM_DT (1 << 26)
268
#define DMA_IE_TIE (1 << 0)
269
#define DMA_IE_TSE (1 << 1)
270
#define DMA_IE_TUE (1 << 2)
271
#define DMA_IE_TJE (1 << 3)
272
#define DMA_IE_OVE (1 << 4)
273
#define DMA_IE_UNE (1 << 5)
274
#define DMA_IE_RIE (1 << 6)
275
#define DMA_IE_RUE (1 << 7)
276
#define DMA_IE_RSE (1 << 8)
277
#define DMA_IE_RWE (1 << 9)
278
#define DMA_IE_ETE (1 << 10)
279
#define DMA_IE_FBE (1 << 13)
280
#define DMA_IE_ERE (1 << 14)
281
#define DMA_IE_AIE (1 << 15)
282
#define DMA_IE_NIE (1 << 16)
287
#define DMA_MFRM_FMCMSK (0xFFFF)
288
#define DMA_MFRM_OC (1 << 16)
289
#define DMA_MFRM_FMA(n) (((n) & 0x0FFE0000) >> 17)
290
#define DMA_MFRM_OF (1 << 28)
295
#define TDES_DB (1 << 0)
296
#define TDES_UF (1 << 1)
297
#define TDES_ED (1 << 2)
298
#define TDES_CCMSK(n) (((n) & 0x000000F0) >> 3)
299
#define TDES_VF (1 << 7)
300
#define TDES_EC (1 << 8)
301
#define TDES_LC (1 << 9)
302
#define TDES_NC (1 << 10)
303
#define TDES_LCAR (1 << 11)
304
#define TDES_IPE (1 << 12)
305
#define TDES_FF (1 << 13)
306
#define TDES_JT (1 << 14)
307
#define TDES_ES (1 << 15)
308
#define TDES_IHE (1 << 16)
309
#define TDES_TTSS (1 << 17)
310
#define TDES_OWN (1UL << 31)
315
#define TDES_ENH_IC (1UL << 30)
316
#define TDES_ENH_LS (1 << 29)
317
#define TDES_ENH_FS (1 << 28)
318
#define TDES_ENH_DC (1 << 27)
319
#define TDES_ENH_DP (1 << 26)
320
#define TDES_ENH_TTSE (1 << 25)
321
#define TDES_ENH_CIC(n) ((n) << 22)
322
#define TDES_ENH_TER (1 << 21)
323
#define TDES_ENH_TCH (1 << 20)
328
#define TDES_NORM_IC (1UL << 31)
329
#define TDES_NORM_FS (1 << 30)
330
#define TDES_NORM_LS (1 << 29)
331
#define TDES_NORM_CIC(n) ((n) << 27)
332
#define TDES_NORM_DC (1 << 26)
333
#define TDES_NORM_TER (1 << 25)
334
#define TDES_NORM_TCH (1 << 24)
335
#define TDES_NORM_DP (1 << 23)
336
#define TDES_NORM_TTSE (1 << 22)
337
#define TDES_NORM_BS2(n) (((n) & 0x3FF) << 11)
338
#define TDES_NORM_BS1(n) (((n) & 0x3FF) << 0)
343
#define TDES_ENH_BS2(n) (((n) & 0xFFF) << 16)
344
#define TDES_ENH_BS1(n) (((n) & 0xFFF) << 0)
349
#define RDES_ESA (1 << 0)
350
#define RDES_CE (1 << 1)
351
#define RDES_DRE (1 << 2)
352
#define RDES_RE (1 << 3)
353
#define RDES_RWT (1 << 4)
354
#define RDES_FT (1 << 5)
355
#define RDES_LC (1 << 6)
356
#define RDES_TSA (1 << 7)
357
#define RDES_LS (1 << 8)
358
#define RDES_FS (1 << 9)
359
#define RDES_VLAN (1 << 10)
360
#define RDES_OE (1 << 11)
361
#define RDES_LE (1 << 12)
362
#define RDES_SAF (1 << 13)
363
#define RDES_DE (1 << 14)
364
#define RDES_ES (1 << 15)
365
#define RDES_FLMSK(n) (((n) & 0x3FFF0000) >> 16)
366
#define RDES_AFM (1 << 30)
367
#define RDES_OWN (1UL << 31)
372
#define RDES_DINT (1UL << 31)
377
#define RDES_NORM_RER (1 << 25)
378
#define RDES_NORM_RCH (1 << 24)
379
#define RDES_NORM_BS2(n) (((n) & 0x3FF) << 11)
380
#define RDES_NORM_BS1(n) (((n) & 0x3FF) << 0)
385
#define RDES_ENH_RER (1 << 15)
386
#define RDES_ENH_RCH (1 << 14)
387
#define RDES_ENH_BS2(n) (((n) & 0xFFF) << 16)
388
#define RDES_ENH_BS1(n) (((n) & 0xFFF) << 0)
393
#define RDES_ENH_IPPL(n) (((n) & 0x7) >> 2)
394
#define RDES_ENH_IPHE (1 << 3)
395
#define RDES_ENH_IPPLE (1 << 4)
396
#define RDES_ENH_IPCSB (1 << 5)
397
#define RDES_ENH_IPV4 (1 << 6)
398
#define RDES_ENH_IPV6 (1 << 7)
399
#define RDES_ENH_MTMSK(n) (((n) & 0xF) >> 8)
404
#define EMAC_ETH_MAX_FLEN (1536)
405
409
typedef
struct
{
410
__IO
uint32_t
CTRLSTAT
;
411
__IO
uint32_t
BSIZE
;
412
__IO
uint32_t
B1ADD
;
413
__IO
uint32_t
B2ADD
;
414
}
IP_ENET_001_TXDESC_Type
;
415
419
typedef
struct
{
420
__IO
uint32_t
CTRLSTAT
;
421
__IO
uint32_t
BSIZE
;
422
__IO
uint32_t
B1ADD
;
423
__IO
uint32_t
B2ADD
;
424
__IO
uint32_t
TDES4
;
425
__IO
uint32_t
TDES5
;
426
__IO
uint32_t
TTSL
;
427
__IO
uint32_t
TTSH
;
428
}
IP_ENET_001_ENHTXDESC_Type
;
429
433
typedef
struct
{
434
__IO
uint32_t
STATUS
;
435
__IO
uint32_t
CTRL
;
436
__IO
uint32_t
B1ADD
;
437
__IO
uint32_t
B2ADD
;
438
}
IP_ENET_001_RXDESC_Type
;
439
443
typedef
struct
{
444
__IO
uint32_t
STATUS
;
445
__IO
uint32_t
CTRL
;
446
__IO
uint32_t
B1ADD
;
447
__IO
uint32_t
B2ADD
;
448
__IO
uint32_t
EXTSTAT
;
449
__IO
uint32_t
RDES5
;
450
__IO
uint32_t
RTSL
;
451
__IO
uint32_t
RTSH
;
452
}
IP_ENET_001_ENHRXDESC_Type
;
453
461
void
IP_ENET_Reset
(
IP_ENET_001_Type
*LPC_ENET);
462
469
void
IP_ENET_SetADDR
(
IP_ENET_001_Type
*LPC_ENET,
const
uint8_t *macAddr);
470
479
void
IP_ENET_Init
(
IP_ENET_001_Type
*LPC_ENET);
480
488
void
IP_ENET_SetupMII
(
IP_ENET_001_Type
*LPC_ENET,
uint32_t
div, uint8_t addr);
489
495
void
IP_ENET_DeInit
(
IP_ENET_001_Type
*LPC_ENET);
496
506
void
IP_ENET_StartMIIWrite
(
IP_ENET_001_Type
*LPC_ENET, uint8_t reg, uint16_t data);
507
517
void
IP_ENET_StartMIIRead
(
IP_ENET_001_Type
*LPC_ENET, uint8_t reg);
518
524
bool
IP_ENET_IsMIIBusy
(
IP_ENET_001_Type
*LPC_ENET);
525
531
STATIC
INLINE
uint16_t
IP_ENET_ReadMIIData
(
IP_ENET_001_Type
*LPC_ENET)
532
{
533
return
LPC_ENET->
MAC_MII_DATA
;
534
}
535
542
void
IP_ENET_TXEnable
(
IP_ENET_001_Type
*LPC_ENET,
bool
Enable);
543
550
void
IP_ENET_RXEnable
(
IP_ENET_001_Type
*LPC_ENET,
bool
Enable);
551
558
void
IP_ENET_SetDuplex
(
IP_ENET_001_Type
*LPC_ENET,
bool
full);
559
566
void
IP_ENET_SetSpeed
(
IP_ENET_001_Type
*LPC_ENET,
bool
speed100);
567
575
void
IP_ENET_InitDescriptors
(
IP_ENET_001_Type
*LPC_ENET,
576
IP_ENET_001_ENHTXDESC_Type
*pTXDescs,
IP_ENET_001_ENHRXDESC_Type
*pRXDescs);
577
583
STATIC
INLINE
void
IP_ENET_RXStart
(
IP_ENET_001_Type
*LPC_ENET)
584
{
585
/* Start receive polling */
586
LPC_ENET->
DMA_REC_POLL_DEMAND
= 1;
587
}
588
594
STATIC
INLINE
void
IP_ENET_TXStart
(
IP_ENET_001_Type
*LPC_ENET)
595
{
596
/* Start transmit polling */
597
LPC_ENET->
DMA_TRANS_POLL_DEMAND
= 1;
598
}
599
604
#ifdef __cplusplus
605
}
606
#endif
607
608
#endif
/* __ENET_001_H_ */
software
lpc_core
lpc_ip
enet_001.h
Generated on Fri Nov 16 2012 13:36:42 for LPCOpen Platform by
1.8.2