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enet_001.c
Go to the documentation of this file.
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/*
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* @brief Ethernet control functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include "
enet_001.h
"
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/*****************************************************************************
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* Private types/enumerations/variables
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****************************************************************************/
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/* Saved address for PHY and clock divider */
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STATIC
uint32_t
phyCfg
;
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/*****************************************************************************
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* Public types/enumerations/variables
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****************************************************************************/
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/*****************************************************************************
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* Private functions
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****************************************************************************/
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/*****************************************************************************
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* Public functions
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****************************************************************************/
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/* Resets ethernet interface */
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void
IP_ENET_Reset
(
IP_ENET_001_Type
*LPC_ENET)
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{
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/* This should be called prior to IP_ENET_Init. The MAC controller may
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not be ready for a call to init right away so a small delay should
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occur after this call. */
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LPC_ENET->
DMA_BUS_MODE
|=
DMA_BM_SWR
;
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}
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/* Sets the address of the interface */
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void
IP_ENET_SetADDR
(
IP_ENET_001_Type
*LPC_ENET,
const
uint8_t *macAddr)
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{
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/* Save MAC address */
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LPC_ENET->
MAC_ADDR0_LOW
= ((
uint32_t
) macAddr[3] << 24) |
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((
uint32_t
) macAddr[2] << 16) | ((
uint32_t
) macAddr[1] << 8) |
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((
uint32_t
) macAddr[0]);
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LPC_ENET->
MAC_ADDR0_HIGH
= ((
uint32_t
) macAddr[5] << 8) |
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((
uint32_t
) macAddr[4]);
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}
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/* Initialize ethernet interface */
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void
IP_ENET_Init
(
IP_ENET_001_Type
*LPC_ENET)
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{
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/* Enhanced descriptors, burst length = 1 */
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LPC_ENET->
DMA_BUS_MODE
=
DMA_BM_ATDS
|
DMA_BM_PBL
(1) |
DMA_BM_RPBL
(1);
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/* Initial MAC configuration for checksum offload, full duplex,
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100Mbps, disable receive own in half duplex, inter-frame gap
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of 64-bits */
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LPC_ENET->
MAC_CONFIG
=
MAC_CFG_BL
(0) |
MAC_CFG_IPC
|
MAC_CFG_DM
|
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MAC_CFG_DO
|
MAC_CFG_FES
|
MAC_CFG_PS
|
MAC_CFG_IFG
(3);
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/* Setup default filter */
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LPC_ENET->
MAC_FRAME_FILTER
=
MAC_FF_PR
|
MAC_FF_RA
;
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/* Flush transmit FIFO */
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LPC_ENET->
DMA_OP_MODE
=
DMA_OM_FTF
;
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/* Setup DMA to flush receive FIFOs at 32 bytes, service TX FIFOs at
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64 bytes */
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LPC_ENET->
DMA_OP_MODE
|=
DMA_OM_RTC
(1) |
DMA_OM_TTC
(0);
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/* Clear all MAC interrupts */
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LPC_ENET->
DMA_STAT
=
DMA_ST_ALL
;
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/* Enable MAC interrupts */
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LPC_ENET->
DMA_INT_EN
= 0;
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}
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/* Sets up the PHY link clock divider and PHY address */
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void
IP_ENET_SetupMII
(
IP_ENET_001_Type
*LPC_ENET,
uint32_t
div, uint8_t addr)
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{
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/* Save clock divider and PHY address in MII address register */
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phyCfg
=
MAC_MIIA_PA
(addr) |
MAC_MIIA_CR
(div);
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}
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/*De-initialize the ethernet interface */
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void
IP_ENET_DeInit
(
IP_ENET_001_Type
*LPC_ENET)
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{
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/* Disable packet reception */
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LPC_ENET->
MAC_CONFIG
= 0;
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/* Flush transmit FIFO */
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LPC_ENET->
DMA_OP_MODE
=
DMA_OM_FTF
;
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/* Disable receive and transmit DMA processes */
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LPC_ENET->
DMA_OP_MODE
= 0;
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}
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/* Starts a PHY write via the MII */
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void
IP_ENET_StartMIIWrite
(
IP_ENET_001_Type
*LPC_ENET, uint8_t reg, uint16_t data)
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{
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/* Write value at PHY address and register */
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LPC_ENET->
MAC_MII_ADDR
=
phyCfg
|
MAC_MIIA_GR
(reg) |
MAC_MIIA_W
;
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LPC_ENET->
MAC_MII_DATA
= (
uint32_t
) data;
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LPC_ENET->
MAC_MII_ADDR
|=
MAC_MIIA_GB
;
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}
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/*Starts a PHY read via the MII */
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void
IP_ENET_StartMIIRead
(
IP_ENET_001_Type
*LPC_ENET, uint8_t reg)
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{
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/* Read value at PHY address and register */
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LPC_ENET->
MAC_MII_ADDR
=
phyCfg
|
MAC_MIIA_GR
(reg);
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LPC_ENET->
MAC_MII_ADDR
|=
MAC_MIIA_GB
;
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}
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/* Returns MII link (PHY) busy status */
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bool
IP_ENET_IsMIIBusy
(
IP_ENET_001_Type
*LPC_ENET)
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{
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if
(LPC_ENET->
MAC_MII_ADDR
&
MAC_MIIA_GB
) {
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return
true
;
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}
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return
false
;
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}
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/* Enables or disables ethernet transmit */
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void
IP_ENET_TXEnable
(
IP_ENET_001_Type
*LPC_ENET,
bool
Enable)
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{
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if
(Enable) {
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/* Descriptor list head pointers must be setup prior to enable */
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LPC_ENET->
MAC_CONFIG
|=
MAC_CFG_TE
;
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LPC_ENET->
DMA_OP_MODE
|=
DMA_OM_ST
;
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}
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else
{
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LPC_ENET->
MAC_CONFIG
&= ~
MAC_CFG_TE
;
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}
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}
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/* Enables or disables ethernet packet reception */
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void
IP_ENET_RXEnable
(
IP_ENET_001_Type
*LPC_ENET,
bool
Enable)
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{
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if
(Enable) {
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/* Descriptor list head pointers must be setup prior to enable */
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LPC_ENET->
MAC_CONFIG
|=
MAC_CFG_RE
;
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LPC_ENET->
DMA_OP_MODE
|=
DMA_OM_SR
;
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}
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else
{
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LPC_ENET->
MAC_CONFIG
&= ~
MAC_CFG_RE
;
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}
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}
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/* Sets full or half duplex for the interface */
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void
IP_ENET_SetDuplex
(
IP_ENET_001_Type
*LPC_ENET,
bool
full)
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{
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if
(full) {
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LPC_ENET->
MAC_CONFIG
|=
MAC_CFG_DM
;
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}
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else
{
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LPC_ENET->
MAC_CONFIG
&= ~
MAC_CFG_DM
;
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}
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}
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/* Sets speed for the interface */
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void
IP_ENET_SetSpeed
(
IP_ENET_001_Type
*LPC_ENET,
bool
speed100)
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{
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if
(speed100) {
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LPC_ENET->
MAC_CONFIG
|=
MAC_CFG_FES
;
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}
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else
{
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LPC_ENET->
MAC_CONFIG
&= ~
MAC_CFG_FES
;
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}
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}
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/* Configures the initial ethernet descriptors */
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void
IP_ENET_InitDescriptors
(
IP_ENET_001_Type
*LPC_ENET,
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IP_ENET_001_ENHTXDESC_Type
*pTXDescs,
IP_ENET_001_ENHRXDESC_Type
*pRXDescs)
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{
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/* Setup descriptor list base addresses */
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LPC_ENET->
DMA_TRANS_DES_ADDR
= (
uint32_t
) pTXDescs;
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LPC_ENET->
DMA_REC_DES_ADDR
= (
uint32_t
) pRXDescs;
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}
software
lpc_core
lpc_ip
enet_001.c
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