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i2c_001.c
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1 /*
2  * @brief I2C driver functions
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #include "i2c_001.h"
33 
34 /*****************************************************************************
35  * Private types/enumerations/variables
36  ****************************************************************************/
37 
38 /* I2C device configuration structure type */
39 typedef struct {
40  union {
41  I2C_M_SETUP_Type txrx_setup_master; /* Transmission setup */
42  I2C_S_SETUP_Type txrx_setup_slave; /* Transmission setup */
43  };
44 
45  int32_t dir; /* Current direction phase, 0 - write, 1 - read */
46 } I2C_CFG_T;
47 
48 #define BLOCKING_TIMEOUT (0x000FFFFFUL)
49 #define RESTRANSMISSION_MAX (0x000000FFUL)
50 
51 /* I2C driver data for I2C0, I2C1 */
52 static I2C_CFG_T i2cdat[3];
53 
54 static bool I2C_MasterComplete[3];
55 static bool I2C_SlaveComplete[3];
56 
57 /*****************************************************************************
58  * Public types/enumerations/variables
59  ****************************************************************************/
60 
61 /*****************************************************************************
62  * Private functions
63  ****************************************************************************/
64 
65 /* Generate a start condition on I2C bus (in master mode only) */
67 {
68  uint32_t cnt = 0;
69  /* Reset STA, STO, SI */
71 
72  /* Enter to Master Transmitter mode */
73  LPC_I2C->CONSET = I2C_I2CONSET_STA;
74 
75  if (Opt == I2C_TRANSFER_POLLING) {
76  /* Wait for complete */
77  while (!(LPC_I2C->CONSET & I2C_I2CONSET_SI)) {
78  if (++cnt > BLOCKING_TIMEOUT) {
79  return I2C_STAT_CODE_ERROR;
80  }
81  }
82  }
83 
84  return LPC_I2C->STAT & I2C_STAT_CODE_BITMASK;
85 }
86 
87 /* Generate a stop condition on I2C bus (in master mode only) */
89 {
90  uint32_t cnt = 0;
91  /* Make sure start bit is not active */
92  if (LPC_I2C->CONSET & I2C_I2CONSET_STA) {
93  LPC_I2C->CONCLR = I2C_I2CONCLR_STAC;
94  }
95 
96  LPC_I2C->CONSET = I2C_I2CONSET_STO;
97 
98  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
99 
100  if (Opt == I2C_TRANSFER_POLLING) {
101  /* wait for stop is sent */
102  while (LPC_I2C->CONSET & I2C_I2CONSET_STO) {
103  if (LPC_I2C->CONSET & I2C_I2CONSET_SI) {
104  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
105  }
106  if (++cnt > BLOCKING_TIMEOUT) {
107  return ERROR;
108  }
109  }
110  }
111 
112  return SUCCESS;
113 }
114 
115 /* I2C send byte subroutine */
116 static uint32_t IP_I2C_SendByte(IP_I2C_001_Type *LPC_I2C, uint8_t databyte)
117 {
118  uint32_t CodeStatus = LPC_I2C->STAT & I2C_STAT_CODE_BITMASK;
119 
120  if ((CodeStatus != I2C_I2STAT_M_TX_START) &&
121  (CodeStatus != I2C_I2STAT_M_TX_RESTART) &&
122  (CodeStatus != I2C_I2STAT_M_TX_SLAW_ACK) &&
123  (CodeStatus != I2C_I2STAT_M_TX_DAT_ACK) ) {
124  return CodeStatus;
125  }
126 
127  LPC_I2C->DAT = databyte & I2C_I2DAT_BITMASK;
128 
129  LPC_I2C->CONSET = I2C_I2CONSET_AA;
130 
131  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
132 
133  return LPC_I2C->STAT & I2C_STAT_CODE_BITMASK;
134 }
135 
136 /* I2C get byte subroutine */
137 static uint32_t IP_I2C_GetByte(IP_I2C_001_Type *LPC_I2C, uint8_t *retdat, bool ack)
138 {
139  *retdat = (uint8_t) (LPC_I2C->DAT & I2C_I2DAT_BITMASK);
140 
141  if (ack == true) {
142  LPC_I2C->CONSET = I2C_I2CONSET_AA;
143  }
144  else {
145  LPC_I2C->CONCLR = I2C_I2CONCLR_AAC;
146  }
147 
148  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
149 
150  return LPC_I2C->STAT & I2C_STAT_CODE_BITMASK;
151 }
152 
153 /* Handle I2C Master states */
155  uint32_t CodeStatus,
156  I2C_M_SETUP_Type *TransferCfg,
158 {
159  uint8_t *txdat;
160  uint8_t *rxdat;
161  uint8_t tmp;
162  int32_t Ret = I2C_OK;
163 
164  /* get buffer to send/receive */
165  txdat = (uint8_t *) &TransferCfg->tx_data[TransferCfg->tx_count];
166  rxdat = (uint8_t *) &TransferCfg->rx_data[TransferCfg->rx_count];
167 
168  switch (CodeStatus) {
171  // case I2C_I2STAT_M_RX_START:
172  // case I2C_I2STAT_M_RX_RESTART
173  /* Send data first */
174  if (TransferCfg->tx_count < TransferCfg->tx_length) {
175  /* Send slave address + WR direction bit = 0 ----------------------------------- */
176  IP_I2C_SendByte(LPC_I2C, (TransferCfg->sl_addr7bit << 1));
177  Ret = I2C_BYTE_SENT;
178  }
179  else if (TransferCfg->rx_count < TransferCfg->rx_length) {
180  /* Send slave address + RD direction bit = 1 ----------------------------------- */
181  IP_I2C_SendByte(LPC_I2C, ((TransferCfg->sl_addr7bit << 1) | 0x01));
182  Ret = I2C_BYTE_SENT;
183  }
184  /* Clear STA bit after the slave address is sent */
185  LPC_I2C->CONCLR = I2C_I2CONCLR_STAC;
186  break;
187 
190 
191  if (TransferCfg->tx_count < TransferCfg->tx_length) {
192  IP_I2C_SendByte(LPC_I2C, *txdat);
193  txdat++;
194  TransferCfg->tx_count++;
195  Ret = I2C_BYTE_SENT;
196  }
197  else {
198  if (TransferCfg->rx_count >= TransferCfg->rx_length) {
199  IP_I2C_Stop(LPC_I2C, Opt);
200  }
201  Ret = I2C_SEND_END;
202 
203  }
204  break;
205 
207  if (TransferCfg->rx_count >= TransferCfg->rx_length) {
208  IP_I2C_Stop(LPC_I2C, Opt);
209  }
210  Ret = I2C_SEND_END;
211  break;
212 
216  // case I2C_I2STAT_M_TX_ARB_LOST:
217  IP_I2C_Stop(LPC_I2C, Opt);
218  Ret = I2C_ERR;
219  break;
220 
222  if (TransferCfg->rx_length > 1) {
223  LPC_I2C->CONSET = I2C_I2CONSET_AA;
224  }
225  else {
226  LPC_I2C->CONCLR = I2C_I2CONCLR_AAC;
227  }
228  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
229 
230  Ret = I2C_BYTE_RECV;
231  break;
232 
234  if (TransferCfg->rx_count < TransferCfg->rx_length) {
235  if ((TransferCfg->rx_length > 1) && (TransferCfg->rx_count < (TransferCfg->rx_length - 2))) {
236  IP_I2C_GetByte(LPC_I2C, &tmp, true);
237  Ret = I2C_BYTE_RECV;
238 
239  }
240  else { /* the next byte is the last byte, send NACK instead */
241  IP_I2C_GetByte(LPC_I2C, &tmp, false);
242  Ret = I2C_BYTE_RECV;
243  }
244  *rxdat++ = tmp;
245 
246  TransferCfg->rx_count++;
247  }
248  else {
249  IP_I2C_Stop(LPC_I2C, Opt);
250  Ret = I2C_RECV_END;
251  }
252  break;
253 
255  IP_I2C_GetByte(LPC_I2C, &tmp, false);
256  if (TransferCfg->rx_count < TransferCfg->rx_length) {
257  *rxdat++ = tmp;
258  TransferCfg->rx_count++;
259  }
260  IP_I2C_Stop(LPC_I2C, Opt);
261  Ret = I2C_RECV_END;
262  break;
263 
267  /* Send STOP condition */
268  IP_I2C_Stop(LPC_I2C, Opt);
269  Ret = I2C_ERR;
270  break;
271 
272  /* No status information */
273  case I2C_I2STAT_NO_INF:
274  if ((TransferCfg->tx_count < TransferCfg->tx_length) ||
275  (TransferCfg->rx_count < TransferCfg->rx_length)) {
276  IP_I2C_Stop(LPC_I2C, Opt);
277  Ret = I2C_ERR;
278  }
279  else {
280  Ret = I2C_RECV_END;
281  }
282  break;
283 
284  default:
285  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
286  break;
287  }
288 
289  return Ret;
290 }
291 
292 /* Handle I2C Master states */
293 static int32_t IP_I2C_SlaveHanleStates(IP_I2C_001_Type *LPC_I2C, uint32_t CodeStatus, I2C_S_SETUP_Type *TransferCfg)
294 {
295  int32_t Ret = I2C_OK;
296  uint8_t *txdat;
297  uint8_t *rxdat;
298 
299  /* get buffer to send/receive */
300  txdat = (uint8_t *) &TransferCfg->tx_data[TransferCfg->tx_count];
301  rxdat = (uint8_t *) &TransferCfg->rx_data[TransferCfg->rx_count];
302 
303  switch (CodeStatus) {
304  /* Reading phase -------------------------------------------------------- */
305  /* Own SLA+R has been received, ACK has been returned */
307 
308  /* General call address has been received, ACK has been returned */
310  LPC_I2C->CONSET = I2C_I2CONSET_AA;
311  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
312  break;
313 
314  /* Arbitration has been lost in Slave Address + R/W bit as bus Master. General Call has
315  been received and ACK has been returned.*/
318  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
319  break;
320 
321  /* Previously addressed with own SLA;
322  * DATA byte has been received;
323  * ACK has been returned */
326  /*
327  * All data bytes that over-flow the specified receive
328  * data length, just ignore them.
329  */
330  if ((TransferCfg->rx_count < TransferCfg->rx_length) && (TransferCfg->rx_data != NULL)) {
331  *rxdat++ = (uint8_t) LPC_I2C->DAT;
332 
333  TransferCfg->rx_count++;
334 
335  Ret = I2C_BYTE_RECV;
336  }
337  if (TransferCfg->rx_count == (TransferCfg->rx_length) ) {
339  Ret = I2C_BYTE_RECV;
340  }
341  else {
342  LPC_I2C->CONSET = I2C_I2CONSET_AA;
343  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
344  }
345 
346  break;
347 
348  /* DATA has been received, Only the first data byte will be received with ACK.
349  * Additional data will be received with NOT ACK. */
351  if ((TransferCfg->rx_count < TransferCfg->rx_length) && (TransferCfg->rx_data != NULL)) {
352  *rxdat++ = (uint8_t) LPC_I2C->DAT;
353 
354  TransferCfg->rx_count++;
355 
356  Ret = I2C_BYTE_RECV;
357  }
359  break;
360 
361  /* Writing phase -------------------------------------------------------- */
362  /* Own SLA+R has been received, ACK has been returned */
364 
365  /* Data has been transmitted, ACK has been received */
367  /*
368  * All data bytes that over-flow the specified receive
369  * data length, just ignore them.
370  */
371  if ((TransferCfg->tx_count < TransferCfg->tx_length) && (TransferCfg->tx_data != NULL)) {
372  LPC_I2C->DAT = *txdat++;
373 
374  TransferCfg->tx_count++;
375 
376  Ret = I2C_BYTE_SENT;
377  }
378 
379  LPC_I2C->CONSET = I2C_I2CONSET_AA;
380  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
381  break;
382 
383  /* Arbitration lost in Slave Address and R/W bit as bus Master.
384  * Own Slave Address + Read has been received, ACK has been returned. */
386  if ((TransferCfg->tx_count < TransferCfg->tx_length) && (TransferCfg->tx_data != NULL)) {
387  LPC_I2C->DAT = *txdat++;
388 
389  TransferCfg->tx_count++;
390 
391  Ret = I2C_BYTE_SENT;
392  }
394  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
395  break;
396 
398  /* Data has been transmitted, NACK has been received,
399  * that means there's no more data to send, exit now */
400  /*
401  * Note: Don't wait for stop event since in slave transmit mode,
402  * since there no proof lets us know when a stop signal has been received
403  * on slave side.
404  */
406  LPC_I2C->CONSET = I2C_I2CONSET_AA;
407  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
408  Ret = I2C_SEND_END;
409  break;
410 
411  /* Previously addressed with own SLA;
412  * DATA byte has been received;
413  * NOT ACK has been returned */
415 
416  /* DATA has been received, NOT ACK has been returned */
418  LPC_I2C->CONSET = I2C_I2CONSET_AA;
419  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
420  Ret = I2C_RECV_END;
421  break;
422 
423  /*
424  * Note that: Return code only let us know a stop condition mixed
425  * with a repeat start condition in the same code value.
426  * So we should provide a time-out. In case this is really a stop
427  * condition, this will return back after time out condition. Otherwise,
428  * next session that is slave receive data will be completed.
429  */
430 
431  /* A Stop or a repeat start condition */
433  LPC_I2C->CONSET = I2C_I2CONSET_AA;
434  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
435  Ret = I2C_STA_STO_RECV;
436  break;
437 
438  /* No status information */
439  case I2C_I2STAT_NO_INF:
440  /* Other status must be captured */
441  default:
442  LPC_I2C->CONSET = I2C_I2CONSET_AA;
443  LPC_I2C->CONCLR = I2C_I2CONCLR_SIC;
444  break;
445 
446  }
447 
448  return Ret;
449 }
450 
451 /*****************************************************************************
452  * Public functions
453  ****************************************************************************/
454 
455 /* Initializes the LPC_I2C peripheral */
457 {
458  /* Set I2C operation to default */
460 }
461 
462 /* De-initializes the I2C peripheral registers to their default reset values */
464 {
465  /* Disable I2C control */
466  LPC_I2C->CONCLR = I2C_I2CONCLR_I2ENC;
467 }
468 
469 /* Set up clock rate for I2Cx */
471 {
472  LPC_I2C->SCLH = (uint32_t) (SCLValue / 2);
473  LPC_I2C->SCLL = (uint32_t) (SCLValue - LPC_I2C->SCLH);
474 }
475 
476 /* Enable or disable I2C peripheral's operation */
477 void IP_I2C_Cmd(IP_I2C_001_Type *LPC_I2C, I2C_Mode Mode, FunctionalState NewState)
478 {
479  if (NewState == ENABLE) {
480  if (Mode != I2C_SLAVE_MODE) {
481  LPC_I2C->CONSET = I2C_I2CONSET_I2EN;
482  }
483  else {
485  }
486  }
487  else {
488  LPC_I2C->CONCLR = I2C_I2CONCLR_I2ENC;
489  }
490 }
491 
492 /* General Master Interrupt handler for I2C peripheral */
494 {
495  uint32_t returnCode;
496  I2C_M_SETUP_Type *txrx_setup;
497  int32_t Ret = I2C_OK;
498 
499  txrx_setup = (I2C_M_SETUP_Type *) &i2cdat[I2C_Num].txrx_setup_master;
500 
501  while (!(LPC_I2C->CONSET & I2C_I2CONSET_SI)) {}
502 
503  returnCode = (uint32_t) (LPC_I2C->STAT & I2C_STAT_CODE_BITMASK);
504 
505  /* Save current status */
506  txrx_setup->status = returnCode;
507 
508  Ret = IP_I2C_MasterHanleStates(LPC_I2C, returnCode, txrx_setup, I2C_TRANSFER_INTERRUPT);
509 
510  if (I2C_CheckError(Ret)) {
511  if (txrx_setup->retransmissions_count < txrx_setup->retransmissions_max) {
512  /* Retry */
513  txrx_setup->retransmissions_count++;
514  txrx_setup->tx_count = 0;
515  txrx_setup->rx_count = 0;
516  /* Reset STA, STO, SI */
518  return;
519  }
520  else {
521  goto s_int_end;
522  }
523  }
524  else if (Ret & I2C_SEND_END) {
525  /* If no need to wait for data from Slave */
526  if (txrx_setup->rx_count >= (txrx_setup->rx_length)) {
527  goto s_int_end;
528  }
529  else { /* Start to wait for data from Slave */
530  /* Reset STA, STO, SI */
532  return;
533  }
534  }
535  else if (Ret & I2C_RECV_END) {
536  goto s_int_end;
537  }
538  else {
539  return;
540  }
541 
542 s_int_end:
543 
545 
546  I2C_MasterComplete[I2C_Num] = true;
547 }
548 
549 /* General Slave Interrupt handler for I2C peripheral */
551 {
552  uint32_t returnCode;
553  I2C_S_SETUP_Type *txrx_setup;
554  int32_t Ret = I2C_OK;
555 
556  txrx_setup = (I2C_S_SETUP_Type *) &i2cdat[I2C_Num].txrx_setup_slave;
557 
558  while (!(LPC_I2C->CONSET & I2C_I2CONSET_SI)) {}
559 
560  returnCode = (uint32_t) (LPC_I2C->STAT & I2C_STAT_CODE_BITMASK);
561  /* Save current status */
562  txrx_setup->status = returnCode;
563 
564  Ret = IP_I2C_SlaveHanleStates(LPC_I2C, returnCode, txrx_setup);
565 
566  if ((I2C_CheckError(Ret)) || (Ret & I2C_STA_STO_RECV) || (Ret & I2C_SEND_END)) {
567  goto s_int_end;
568  }
569  else {
570  return;
571  }
572 
573 s_int_end:
575 
576  I2C_SlaveComplete[I2C_Num] = true;
577 }
578 
579 /* Transmit and Receive data in master mode */
581  I2C_ID_Type I2C_Num,
582  I2C_M_SETUP_Type *TransferCfg,
584 {
585  uint32_t CodeStatus;
586  int32_t Ret = I2C_OK;
587 
588  /* Reset I2C setup value to default state */
589  TransferCfg->tx_count = 0;
590  TransferCfg->rx_count = 0;
591  TransferCfg->status = 0;
592 
593  if (Opt == I2C_TRANSFER_POLLING) {
594  /* First Start condition -------------------------------------------------------------- */
595  TransferCfg->retransmissions_count = 0;
596 retry:
597  /* Reset I2C setup value to default state */
598  TransferCfg->tx_count = 0;
599  TransferCfg->rx_count = 0;
600 
601  /* Start command */
602  CodeStatus = IP_I2C_Start(LPC_I2C, I2C_TRANSFER_POLLING);
603 
604  while (1) { /* send data first and then receive data from Slave */
605  Ret = IP_I2C_MasterHanleStates(LPC_I2C, CodeStatus, TransferCfg, I2C_TRANSFER_POLLING);
606  if (I2C_CheckError(Ret)) {
607  TransferCfg->retransmissions_count++;
608  if (TransferCfg->retransmissions_count > TransferCfg->retransmissions_max) {
609  /* save status */
610  TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_NOACKF;
611  goto error;
612  }
613  else {
614  goto retry;
615  }
616  }
617  else if ( (Ret & I2C_BYTE_SENT) ||
618  (Ret & I2C_BYTE_RECV)) {
619  /* Wait for sending ends/ Wait for next byte */
620  while (!(LPC_I2C->CONSET & I2C_I2CONSET_SI)) {}
621  }
622  else if (Ret & I2C_SEND_END) { /* already send all data */
623  /* If no need to wait for data from Slave */
624  if (TransferCfg->rx_count >= (TransferCfg->rx_length)) {
625  break;
626  }
627  else {
629  }
630  }
631  else if (Ret & I2C_RECV_END) { /* already receive all data */
632  break;
633  }
634  CodeStatus = LPC_I2C->STAT & I2C_STAT_CODE_BITMASK;
635  }
636  return SUCCESS;
637 error:
638  return ERROR;
639  }
640  else if (Opt == I2C_TRANSFER_INTERRUPT) {
641  I2C_MasterComplete[I2C_Num] = false;
642  /* Setup tx_rx data, callback and interrupt handler */
643  i2cdat[I2C_Num].txrx_setup_master = *TransferCfg;
644 
645  /* Set direction phase, write first */
646  i2cdat[I2C_Num].dir = 0;
647 
648  /* First Start condition -------------------------------------------------------------- */
649  /* Reset STA, STO, SI */
651  LPC_I2C->CONSET = I2C_I2CONSET_STA;
652 
653  return SUCCESS;
654  }
655 
656  return ERROR;
657 }
658 
659 /* Receive and Transmit data in slave mode */
661  I2C_ID_Type I2C_Num,
662  I2C_S_SETUP_Type *TransferCfg,
664 {
665  int32_t Ret = I2C_OK;
666  uint32_t CodeStatus = 0;
667 
668  /* Reset I2C setup value to default state */
669  TransferCfg->tx_count = 0;
670  TransferCfg->rx_count = 0;
671  TransferCfg->status = 0;
672 
673  /* Polling option */
674  if (Opt == I2C_TRANSFER_POLLING) {
675  /* Set AA bit to ACK command on I2C bus */
676  LPC_I2C->CONSET = I2C_I2CONSET_AA;
677 
678  /* Clear SI bit to be ready ... */
680 
681  while (1) {
682  /* Check SI flag ready */
683  if (LPC_I2C->CONSET & I2C_I2CONSET_SI) {
684  CodeStatus = (LPC_I2C->STAT & I2C_STAT_CODE_BITMASK);
685 
686  Ret = IP_I2C_SlaveHanleStates(LPC_I2C, CodeStatus, TransferCfg);
687  if (I2C_CheckError(Ret)) {
688  goto s_error;
689  }
690  else if ((Ret & I2C_STA_STO_RECV) || (Ret & I2C_SEND_END)) {
691  goto s_end_stage;
692  }
693  }
694  }
695 
696 s_end_stage:
697  /* Clear AA bit to disable ACK on I2C bus */
698  LPC_I2C->CONCLR = I2C_I2CONCLR_AAC;
699 
700  /* Check if there's no error during operation
701  * Update status
702  */
703  TransferCfg->status = CodeStatus | I2C_SETUP_STATUS_DONE;
704  return SUCCESS;
705 
706 s_error:
707  /* Clear AA bit to disable ACK on I2C bus */
708  LPC_I2C->CONCLR = I2C_I2CONCLR_AAC;
709 
710  /* Update status */
711  TransferCfg->status = CodeStatus;
712  return ERROR;
713  }
714 
715  else if (Opt == I2C_TRANSFER_INTERRUPT) {
716  I2C_SlaveComplete[I2C_Num] = false;
717  /* Setup tx_rx data, callback and interrupt handler */
718  i2cdat[I2C_Num].txrx_setup_slave = *TransferCfg;
719 
720  /* Set direction phase, read first */
721  i2cdat[I2C_Num].dir = 1;
722 
723  /* Enable AA */
724  LPC_I2C->CONSET = I2C_I2CONSET_AA;
726 
727  return SUCCESS;
728  }
729 
730  return ERROR;
731 }
732 
733 /* Get status of Master Transfer */
735 {
736  bool retval;
737 
738  retval = I2C_MasterComplete[I2C_Num];
739 
740  I2C_MasterComplete[I2C_Num] = false;
741 
742  return retval;
743 }
744 
745 /* Get status of Slave Transfer */
747 {
748  bool retval;
749 
750  retval = I2C_SlaveComplete[I2C_Num];
751 
752  I2C_SlaveComplete[I2C_Num] = false;
753 
754  return retval;
755 }
756 
757 /* Set Own slave address in I2C peripheral corresponding to parameter specified in OwnSlaveAddrConfigStruct */
758 void IP_I2C_SetOwnSlaveAddr(IP_I2C_001_Type *LPC_I2C, I2C_OWNSLAVEADDR_CFG_Type *OwnSlaveAddrConfigStruct)
759 {
760  uint32_t tmp;
761 
762  tmp = (((uint32_t) (OwnSlaveAddrConfigStruct->SlaveAddr_7bit << 1)) \
763  | ((OwnSlaveAddrConfigStruct->GeneralCallState == ENABLE) ? 0x01 : 0x00)) & I2C_I2ADR_BITMASK;
764  switch (OwnSlaveAddrConfigStruct->SlaveAddrChannel) {
765  case 0:
766  LPC_I2C->ADR0 = tmp;
767  LPC_I2C->MASK[0] =
768  I2C_I2MASK_MASK((uint32_t) (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
769  break;
770 
771  case 1:
772  LPC_I2C->ADR1 = tmp;
773  LPC_I2C->MASK[1] = I2C_I2MASK_MASK((uint32_t) (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
774  break;
775 
776  case 2:
777  LPC_I2C->ADR2 = tmp;
778  LPC_I2C->MASK[2] = I2C_I2MASK_MASK((uint32_t) (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
779  break;
780 
781  case 3:
782  LPC_I2C->ADR3 = tmp;
783  LPC_I2C->MASK[3] = I2C_I2MASK_MASK((uint32_t) (OwnSlaveAddrConfigStruct->SlaveAddrMaskValue));
784  break;
785  }
786 }