LPCOpen Platform
LPCOpen Platform for NXP LPC Microcontrollers
 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
CHIP: LPC18xx/43xx General Purpose DMA driver

Data Structures

struct  DMA_ChannelHandle_t
 

Macros

#define GPDMA_NUMBER_CHANNELS   8
 
#define GPDMA_CONN_MEMORY   ((0UL))
 
#define GPDMA_CONN_MAT0_0   ((1UL))
 
#define GPDMA_CONN_UART0_Tx   ((2UL))
 
#define GPDMA_CONN_MAT0_1   ((3UL))
 
#define GPDMA_CONN_UART0_Rx   ((4UL))
 
#define GPDMA_CONN_MAT1_0   ((5UL))
 
#define GPDMA_CONN_UART1_Tx   ((6UL))
 
#define GPDMA_CONN_MAT1_1   ((7UL))
 
#define GPDMA_CONN_UART1_Rx   ((8UL))
 
#define GPDMA_CONN_MAT2_0   ((9UL))
 
#define GPDMA_CONN_UART2_Tx   ((10UL))
 
#define GPDMA_CONN_MAT2_1   ((11UL))
 
#define GPDMA_CONN_UART2_Rx   ((12UL))
 
#define GPDMA_CONN_MAT3_0   ((13UL))
 
#define GPDMA_CONN_UART3_Tx   ((14UL))
 
#define GPDMA_CONN_SCT_0   ((15UL))
 
#define GPDMA_CONN_MAT3_1   ((16UL))
 
#define GPDMA_CONN_UART3_Rx   ((17UL))
 
#define GPDMA_CONN_SCT_1   ((18UL))
 
#define GPDMA_CONN_SSP0_Rx   ((19UL))
 
#define GPDMA_CONN_I2S_Tx_Channel_0   ((20UL))
 
#define GPDMA_CONN_SSP0_Tx   ((21UL))
 
#define GPDMA_CONN_I2S_Rx_Channel_1   ((22UL))
 
#define GPDMA_CONN_SSP1_Rx   ((23UL))
 
#define GPDMA_CONN_SSP1_Tx   ((24UL))
 
#define GPDMA_CONN_ADC_0   ((25UL))
 
#define GPDMA_CONN_ADC_1   ((26UL))
 
#define GPDMA_CONN_DAC   ((27UL))
 
#define GPDMA_CONN_I2S_Tx_Channel_1   ((28UL))
 
#define GPDMA_CONN_I2S_Rx_Channel_0   ((29UL))
 
#define GPDMA_BSIZE_1   ((0UL))
 
#define GPDMA_BSIZE_4   ((1UL))
 
#define GPDMA_BSIZE_8   ((2UL))
 
#define GPDMA_BSIZE_16   ((3UL))
 
#define GPDMA_BSIZE_32   ((4UL))
 
#define GPDMA_BSIZE_64   ((5UL))
 
#define GPDMA_BSIZE_128   ((6UL))
 
#define GPDMA_BSIZE_256   ((7UL))
 
#define GPDMA_WIDTH_BYTE   ((0UL))
 
#define GPDMA_WIDTH_HALFWORD   ((1UL))
 
#define GPDMA_WIDTH_WORD   ((2UL))
 
#define DMA_CONTROLLER   0
 
#define SRC_PER_CONTROLLER   1
 
#define DST_PER_CONTROLLER   2
 
#define Chip_GPDMA_IntGetStatus(type, channel)   IP_GPDMA_IntGetStatus(LPC_GPDMA, type, channel)
 
#define Chip_GPDMA_ClearIntPending(type, channel)   IP_GPDMA_ClearIntPending(LPC_GPDMA, type, channel)
 
#define Chip_GPDMA_ChannelCmd(channelNum, NewState)   IP_GPDMA_ChannelCmd(LPC_GPDMA, channelNum, NewState)
 

Functions

void Chip_GPDMA_Init (void)
 Initialize the GPDMA.
 
void Chip_DMA_Stop (uint8_t ChannelNum)
 Stop a stream DMA transfer.
 
Status Chip_DMA_Interrupt (uint8_t ChannelNum)
 The GPDMA stream interrupt status checking.
 
uint8_t Chip_DMA_GetFreeChannel (uint32_t PeripheralConnection_ID)
 Get a free GPDMA channel for one DMA connection.
 
void Chip_DMA_Transfer (uint8_t ChannelNum, uint32_t src, uint32_t dst, FlowControlType TransferType, uint32_t Size)
 Do a DMA transfer M2M, M2P,P2M or P2P.
 

Detailed Description

Macro Definition Documentation

#define Chip_GPDMA_ChannelCmd (   channelNum,
  NewState 
)    IP_GPDMA_ChannelCmd(LPC_GPDMA, channelNum, NewState)

Definition at line 109 of file gpdma_18xx_43xx.h.

#define Chip_GPDMA_ClearIntPending (   type,
  channel 
)    IP_GPDMA_ClearIntPending(LPC_GPDMA, type, channel)

Definition at line 107 of file gpdma_18xx_43xx.h.

#define Chip_GPDMA_IntGetStatus (   type,
  channel 
)    IP_GPDMA_IntGetStatus(LPC_GPDMA, type, channel)

Definition at line 105 of file gpdma_18xx_43xx.h.

#define DMA_CONTROLLER   0

Flow control definitions Flow control is DMA controller

Definition at line 97 of file gpdma_18xx_43xx.h.

#define DST_PER_CONTROLLER   2

Flow control is Destination peripheral controller

Definition at line 99 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_1   ((0UL))

Burst size in Source and Destination definitions Burst size = 1

Definition at line 82 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_128   ((6UL))

Burst size = 128

Definition at line 88 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_16   ((3UL))

Burst size = 16

Definition at line 85 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_256   ((7UL))

Burst size = 256

Definition at line 89 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_32   ((4UL))

Burst size = 32

Definition at line 86 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_4   ((1UL))

Burst size = 4

Definition at line 83 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_64   ((5UL))

Burst size = 64

Definition at line 87 of file gpdma_18xx_43xx.h.

#define GPDMA_BSIZE_8   ((2UL))

Burst size = 8

Definition at line 84 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_ADC_0   ((25UL))

ADC 0

Definition at line 75 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_ADC_1   ((26UL))

ADC 1

Definition at line 76 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_DAC   ((27UL))

DAC

Definition at line 77 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_I2S_Rx_Channel_0   ((29UL))

I2S channel 0

Definition at line 79 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_I2S_Rx_Channel_1   ((22UL))

I2S channel 1

Definition at line 72 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_I2S_Tx_Channel_0   ((20UL))

I2S channel 0

Definition at line 70 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_I2S_Tx_Channel_1   ((28UL))

I2S channel 0

Definition at line 78 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT0_0   ((1UL))

MAT0.0

Definition at line 51 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT0_1   ((3UL))

MAT0.1

Definition at line 53 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT1_0   ((5UL))

MAT1.0

Definition at line 55 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT1_1   ((7UL))

MAT1.1

Definition at line 57 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT2_0   ((9UL))

MAT2.0

Definition at line 59 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT2_1   ((11UL))

MAT2.1

Definition at line 61 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT3_0   ((13UL))

MAT3.0

Definition at line 63 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MAT3_1   ((16UL))

MAT3.1

Definition at line 66 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_MEMORY   ((0UL))

DMA Connection number definitions MEMORY

Definition at line 50 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_SCT_0   ((15UL))

SCT timer channel 0

Definition at line 65 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_SCT_1   ((18UL))

SCT timer channel 1

Definition at line 68 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_SSP0_Rx   ((19UL))

SSP0 Rx

Definition at line 69 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_SSP0_Tx   ((21UL))

SSP0 Tx

Definition at line 71 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_SSP1_Rx   ((23UL))

SSP1 Rx

Definition at line 73 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_SSP1_Tx   ((24UL))

SSP1 Tx

Definition at line 74 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART0_Rx   ((4UL))

UART0 Rx

Definition at line 54 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART0_Tx   ((2UL))

UART0 Tx

Definition at line 52 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART1_Rx   ((8UL))

UART1 Rx

Definition at line 58 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART1_Tx   ((6UL))

UART1 Tx

Definition at line 56 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART2_Rx   ((12UL))

UART2 Rx

Definition at line 62 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART2_Tx   ((10UL))

UART2 Tx

Definition at line 60 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART3_Rx   ((17UL))

UART3 Rx

Definition at line 67 of file gpdma_18xx_43xx.h.

#define GPDMA_CONN_UART3_Tx   ((14UL))

UART3 Tx

Definition at line 64 of file gpdma_18xx_43xx.h.

#define GPDMA_NUMBER_CHANNELS   8

Number of channels on GPDMA

Definition at line 47 of file gpdma_18xx_43xx.h.

#define GPDMA_WIDTH_BYTE   ((0UL))

Width in Source transfer width and Destination transfer width definitions Width = 1 byte

Definition at line 92 of file gpdma_18xx_43xx.h.

#define GPDMA_WIDTH_HALFWORD   ((1UL))

Width = 2 bytes

Definition at line 93 of file gpdma_18xx_43xx.h.

#define GPDMA_WIDTH_WORD   ((2UL))

Width = 4 bytes

Definition at line 94 of file gpdma_18xx_43xx.h.

#define SRC_PER_CONTROLLER   1

Flow control is Source peripheral controller

Definition at line 98 of file gpdma_18xx_43xx.h.

Function Documentation

uint8_t Chip_DMA_GetFreeChannel ( uint32_t  PeripheralConnection_ID)

Get a free GPDMA channel for one DMA connection.

Parameters
PeripheralConnection_ID: Some chip fix each peripheral DMA connection on a specified channel ( have not used in 18xx/43xx )
Returns
The channel number which is selected

Definition at line 414 of file gpdma_18xx_43xx.c.

Status Chip_DMA_Interrupt ( uint8_t  ChannelNum)

The GPDMA stream interrupt status checking.

Parameters
ChannelNum: Channel Number to be checked on interruption
Returns
Status:
  • SUCCESS : DMA transfer success
  • ERROR : DMA transfer failed

Definition at line 337 of file gpdma_18xx_43xx.c.

void Chip_DMA_Stop ( uint8_t  ChannelNum)

Stop a stream DMA transfer.

Parameters
ChannelNum: Channel Number to be closed
Returns
Nothing

Definition at line 322 of file gpdma_18xx_43xx.c.

void Chip_DMA_Transfer ( uint8_t  ChannelNum,
uint32_t  src,
uint32_t  dst,
FlowControlType  TransferType,
uint32_t  Size 
)

Do a DMA transfer M2M, M2P,P2M or P2P.

Parameters
ChannelNum: Channel used for transfer
src: Address of Memory or PeripheralConnection_ID which is the source
dst: Address of Memory or PeripheralConnection_ID which is the destination
TransferType: Select the transfer controller and the type of transfer. Should be:
  • GPDMA_TRANSFERTYPE_M2M_CONTROLLER_DMA
  • GPDMA_TRANSFERTYPE_M2P_CONTROLLER_DMA
  • GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA
  • GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DMA
  • GPDMA_TRANSFERTYPE_P2P_CONTROLLER_DestPERIPHERAL
  • GPDMA_TRANSFERTYPE_M2P_CONTROLLER_PERIPHERAL
  • GPDMA_TRANSFERTYPE_P2M_CONTROLLER_PERIPHERAL
  • GPDMA_TRANSFERTYPE_P2P_CONTROLLER_SrcPERIPHERAL
Size: The number of DMA transfers
Returns
Nothing

Definition at line 359 of file gpdma_18xx_43xx.c.

void Chip_GPDMA_Init ( void  )

Initialize the GPDMA.

Returns
Nothing

Definition at line 312 of file gpdma_18xx_43xx.c.