LPCOpen Platform
LPCOpen Platform for NXP LPC Microcontrollers
 All Data Structures Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
usart_001.h
Go to the documentation of this file.
1 /*
2  * @brief Usart Registers and control functions
3  *
4  * @note
5  * Copyright(C) NXP Semiconductors, 2012
6  * All rights reserved.
7  *
8  * @par
9  * Software that is described herein is for illustrative purposes only
10  * which provides customers with programming information regarding the
11  * LPC products. This software is supplied "AS IS" without any warranties of
12  * any kind, and NXP Semiconductors and its licensor disclaim any and
13  * all warranties, express or implied, including all implied warranties of
14  * merchantability, fitness for a particular purpose and non-infringement of
15  * intellectual property rights. NXP Semiconductors assumes no responsibility
16  * or liability for the use of the software, conveys no license or rights under any
17  * patent, copyright, mask work right, or any other intellectual property rights in
18  * or to any products. NXP Semiconductors reserves the right to make changes
19  * in the software without notification. NXP Semiconductors also makes no
20  * representation or warranty that such application will be suitable for the
21  * specified use without further testing or modification.
22  *
23  * @par
24  * Permission to use, copy, modify, and distribute this software and its
25  * documentation is hereby granted, under NXP Semiconductors' and its
26  * licensor's relevant copyrights in the software, without fee, provided that it
27  * is used in conjunction with NXP Semiconductors microcontrollers. This
28  * copyright, permission, and disclaimer notice must appear in all copies of
29  * this code.
30  */
31 
32 #ifndef __USART_001_H_
33 #define __USART_001_H_
34 
35 #include "sys_config.h"
36 #include "cmsis.h"
37 
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 
50 typedef struct {
52  union {
53  __IO uint32_t DLL;
54  __O uint32_t THR;
55  __I uint32_t RBR;
56  };
57 
58  union {
59  __IO uint32_t IER;
60  __IO uint32_t DLM;
61  };
62 
63  union {
64  __O uint32_t FCR;
65  __I uint32_t IIR;
66  };
67 
68  __IO uint32_t LCR;
69  __IO uint32_t MCR;
70  __I uint32_t LSR;
71  __I uint32_t MSR;
72  __IO uint32_t SCR;
73  __IO uint32_t ACR;
74  __IO uint32_t ICR;
75  __IO uint32_t FDR;
76  __IO uint32_t OSR;
77  __IO uint32_t TER1;
78  uint32_t RESERVED0[3];
79  __IO uint32_t HDEN;
80  __I uint32_t RESERVED1[1];
85  union {
88  };
89 
90  __IO uint32_t TER2;
92 
93 #define UART_BLOCKING_TIMEOUT (0xFFFFFFFFUL)
95 #define UART_ACCEPTED_BAUDRATE_ERROR (3)
97 /* --------------------- BIT DEFINITIONS -------------------------------------- */
98 
101 #define UART_RBR_MASKBIT ((uint8_t) 0xFF)
106 #define UART_THR_MASKBIT ((uint8_t) 0xFF)
111 #define UART_LOAD_DLL(div) ((div) & 0xFF)
112 #define UART_DLL_MASKBIT ((uint8_t) 0xFF)
117 #define UART_DLM_MASKBIT ((uint8_t) 0xFF)
118 #define UART_LOAD_DLM(div) (((div) >> 8) & 0xFF)
123 #define UART_IER_RBRINT_EN ((uint32_t) (1 << 0))
124 #define UART_IER_THREINT_EN ((uint32_t) (1 << 1))
125 #define UART_IER_RLSINT_EN ((uint32_t) (1 << 2))
126 #define UART_IER_MSINT_EN ((uint32_t) (1 << 3))
127 #define UART_IER_CTSINT_EN ((uint32_t) (1 << 7))
128 #define UART_IER_ABEOINT_EN ((uint32_t) (1 << 8))
129 #define UART_IER_ABTOINT_EN ((uint32_t) (1 << 9))
130 #define UART_IER_BITMASK ((uint32_t) (0x307))
131 #define UART1_IER_BITMASK ((uint32_t) (0x38F))
136 #define UART_IIR_INTSTAT_PEND ((uint32_t) (1 << 0))
137 #define UART_IIR_INTID_RLS ((uint32_t) (3 << 1))
138 #define UART_IIR_INTID_RDA ((uint32_t) (2 << 1))
139 #define UART_IIR_INTID_CTI ((uint32_t) (6 << 1))
140 #define UART_IIR_INTID_THRE ((uint32_t) (1 << 1))
141 #define UART_IIR_INTID_MODEM ((uint32_t) (0 << 1))
142 #define UART_IIR_INTID_MASK ((uint32_t) (7 << 1))
143 #define UART_IIR_FIFO_EN ((uint32_t) (3 << 6))
144 #define UART_IIR_ABEO_INT ((uint32_t) (1 << 8))
145 #define UART_IIR_ABTO_INT ((uint32_t) (1 << 9))
146 #define UART_IIR_BITMASK ((uint32_t) (0x3CF))
151 #define UART_FCR_FIFO_EN ((uint8_t) (1 << 0))
152 #define UART_FCR_RX_RS ((uint8_t) (1 << 1))
153 #define UART_FCR_TX_RS ((uint8_t) (1 << 2))
154 #define UART_FCR_DMAMODE_SEL ((uint8_t) (1 << 3))
155 #define UART_FCR_TRG_LEV0 ((uint8_t) (0))
156 #define UART_FCR_TRG_LEV1 ((uint8_t) (1 << 6))
157 #define UART_FCR_TRG_LEV2 ((uint8_t) (2 << 6))
158 #define UART_FCR_TRG_LEV3 ((uint8_t) (3 << 6))
159 #define UART_FCR_BITMASK ((uint8_t) (0xCF))
160 #define UART_TX_FIFO_SIZE (16)
161 
165 #define UART_LCR_WLEN5 ((uint8_t) (0))
166 #define UART_LCR_WLEN6 ((uint8_t) (1 << 0))
167 #define UART_LCR_WLEN7 ((uint8_t) (2 << 0))
168 #define UART_LCR_WLEN8 ((uint8_t) (3 << 0))
169 #define UART_LCR_SBS_1BIT ((uint8_t) (0 << 2))
170 #define UART_LCR_SBS_2BIT ((uint8_t) (1 << 2))
171 #define UART_LCR_PARITY_EN ((uint8_t) (1 << 3))
172 #define UART_LCR_PARITY_DIS ((uint8_t) (0 << 3))
173 #define UART_LCR_PARITY_ODD ((uint8_t) (0))
174 #define UART_LCR_PARITY_EVEN ((uint8_t) (1 << 4))
175 #define UART_LCR_PARITY_F_1 ((uint8_t) (2 << 4))
176 #define UART_LCR_PARITY_F_0 ((uint8_t) (3 << 4))
177 #define UART_LCR_BREAK_EN ((uint8_t) (1 << 6))
178 #define UART_LCR_DLAB_EN ((uint8_t) (1 << 7))
179 #define UART_LCR_BITMASK ((uint8_t) (0xFF))
184 #define UART_MCR_DTR_CTRL ((uint8_t) (1 << 0))
185 #define UART_MCR_RTS_CTRL ((uint8_t) (1 << 1))
186 #define UART_MCR_LOOPB_EN ((uint8_t) (1 << 4))
187 #define UART_MCR_AUTO_RTS_EN ((uint8_t) (1 << 6))
188 #define UART_MCR_AUTO_CTS_EN ((uint8_t) (1 << 7))
189 #define UART_MCR_BITMASK ((uint8_t) (0x0F3))
194 #define UART_LSR_RDR ((uint8_t) (1 << 0))
195 #define UART_LSR_OE ((uint8_t) (1 << 1))
196 #define UART_LSR_PE ((uint8_t) (1 << 2))
197 #define UART_LSR_FE ((uint8_t) (1 << 3))
198 #define UART_LSR_BI ((uint8_t) (1 << 4))
199 #define UART_LSR_THRE ((uint8_t) (1 << 5))
200 #define UART_LSR_TEMT ((uint8_t) (1 << 6))
201 #define UART_LSR_RXFE ((uint8_t) (1 << 7))
202 #define UART_LSR_BITMASK ((uint8_t) (0xFF))
207 #define UART_MSR_DELTA_CTS ((uint8_t) (1 << 0))
208 #define UART_MSR_DELTA_DSR ((uint8_t) (1 << 1))
209 #define UART_MSR_LO2HI_RI ((uint8_t) (1 << 2))
210 #define UART_MSR_DELTA_DCD ((uint8_t) (1 << 3))
211 #define UART_MSR_CTS ((uint8_t) (1 << 4))
212 #define UART_MSR_DSR ((uint8_t) (1 << 5))
213 #define UART_MSR_RI ((uint8_t) (1 << 6))
214 #define UART_MSR_DCD ((uint8_t) (1 << 7))
215 #define UART_MSR_BITMASK ((uint8_t) (0xFF))
220 #define UART_SCR_BIMASK ((uint8_t) (0xFF))
225 #define UART_ACR_START ((uint32_t) (1 << 0))
226 #define UART_ACR_MODE ((uint32_t) (1 << 1))
227 #define UART_ACR_AUTO_RESTART ((uint32_t) (1 << 2))
228 #define UART_ACR_ABEOINT_CLR ((uint32_t) (1 << 8))
229 #define UART_ACR_ABTOINT_CLR ((uint32_t) (1 << 9))
230 #define UART_ACR_BITMASK ((uint32_t) (0x307))
235 #define UART_ICR_IRDAEN ((uint32_t) (1 << 0))
236 #define UART_ICR_IRDAINV ((uint32_t) (1 << 1))
237 #define UART_ICR_FIXPULSE_EN ((uint32_t) (1 << 2))
238 #define UART_ICR_PULSEDIV(n) ((uint32_t) ((n & 0x07) << 3))
239 #define UART_ICR_BITMASK ((uint32_t) (0x3F))
244 #define UART_HDEN_HDEN ((uint32_t) (1 << 0))
249 #define UART_SCICTRL_SCIEN ((uint32_t) (1 << 0))
250 #define UART_SCICTRL_NACKDIS ((uint32_t) (1 << 1))
251 #define UART_SCICTRL_PROTSEL_T1 ((uint32_t) (1 << 2))
252 #define UART_SCICTRL_TXRETRY(n) ((uint32_t) ((n & 0x07) << 5))
253 #define UART_SCICTRL_GUARDTIME(n) ((uint32_t) ((n & 0xFF) << 8))
258 #define UART_SYNCCTRL_SYNC ((uint32_t) (1 << 0))
259 #define UART_SYNCCTRL_CSRC_MASTER ((uint32_t) (1 << 1))
260 #define UART_SYNCCTRL_FES ((uint32_t) (1 << 2))
261 #define UART_SYNCCTRL_TSBYPASS ((uint32_t) (1 << 3))
262 #define UART_SYNCCTRL_CSCEN ((uint32_t) (1 << 4))
263 #define UART_SYNCCTRL_STARTSTOPDISABLE ((uint32_t) (1 << 5))
264 #define UART_SYNCCTRL_CCCLR ((uint32_t) (1 << 6))
269 #define UART_FDR_DIVADDVAL(n) ((uint32_t) (n & 0x0F))
270 #define UART_FDR_MULVAL(n) ((uint32_t) ((n << 4) & 0xF0))
271 #define UART_FDR_BITMASK ((uint32_t) (0xFF))
276 #define UART_TER1_TXEN ((uint8_t) (1 << 7))
277 #define UART_TER1_BITMASK ((uint8_t) (0x80))
278 #define UART_TER2_TXEN ((uint8_t) (1 << 0))
279 #define UART_TER2_BITMASK ((uint8_t) (0x01))
284 #define UART_RS485CTRL_NMM_EN ((uint32_t) (1 << 0))
285 #define UART_RS485CTRL_RX_DIS ((uint32_t) (1 << 1))
286 #define UART_RS485CTRL_AADEN ((uint32_t) (1 << 2))
287 #define UART_RS485CTRL_SEL_DTR ((uint32_t) (1 << 3))
289 #define UART_RS485CTRL_DCTRL_EN ((uint32_t) (1 << 4))
290 #define UART_RS485CTRL_OINV_1 ((uint32_t) (1 << 5))
293 #define UART_RS485CTRL_BITMASK ((uint32_t) (0x3F))
298 #define UART_RS485ADRMATCH_BITMASK ((uint8_t) (0xFF))
303 #define UART_RS485DLY_BITMASK ((uint8_t) (0xFF))
308 #define UART_FIFOLVL_RXFIFOLVL(n) ((uint32_t) (n & 0x0F))
309 #define UART_FIFOLVL_TXFIFOLVL(n) ((uint32_t) ((n >> 8) & 0x0F))
310 #define UART_FIFOLVL_BITMASK ((uint32_t) (0x0F0F))
315 #define UART_RING_BUFSIZE 256
316 #define __BUF_MASK (UART_RING_BUFSIZE - 1)
317 #define __BUF_IS_FULL(head, tail) ((tail & __BUF_MASK) == ((head + 1) & __BUF_MASK))
318 #define __BUF_WILL_FULL(head, tail) ((tail & __BUF_MASK) == ((head + 2) & __BUF_MASK))
319 #define __BUF_IS_EMPTY(head, tail) ((head & __BUF_MASK) == (tail & __BUF_MASK))
320 #define __BUF_RESET(bufidx) (bufidx = 0)
321 #define __BUF_INCR(bufidx) (bufidx = (bufidx + 1) & __BUF_MASK)
326 typedef struct {
331  __IO uint8_t tx[UART_RING_BUFSIZE];
332  __IO uint8_t rx[UART_RING_BUFSIZE];
334 
338 typedef enum {
348 
352 typedef enum {
356 
360 typedef enum {
361  INACTIVE = 0,
364 
368 typedef enum {
378 
382 typedef enum {
386 
390 typedef enum {
395 
399 typedef enum {
407 } UART_INT_Type;
408 
412 typedef enum {
414  UART_PARITY_ODD = (4 << 3),
415  UART_PARITY_EVEN = (5 << 3),
416  UART_PARITY_SP_1 = (6 << 3),
417  UART_PARITY_SP_0 = (7 << 3)
419 
423 typedef enum {
429 
433 typedef enum {
435  UART_STOPBIT_2 = (1 << 2)
437 
441 typedef enum {
447 
451 typedef enum {
452  UART_0 = 0,
457 } UART_ID_Type;
458 
462 typedef enum {
467 
471 typedef struct {
472  FunctionalState FIFO_ResetRxBuf;
476  FunctionalState FIFO_ResetTxBuf;
480  FunctionalState FIFO_DMAMode;
484  UART_FITO_LEVEL_Type FIFO_Level;
491 
499 
507 
516 
537  UART_DATABIT_Type Databits,
538  UART_PARITY_Type Parity,
539  UART_STOPBIT_Type Stopbits);
540 
541 /* UART Send/Receive functions -------------------------------------------------*/
549 
557 
570 
583 
584 /* UART operate functions -------------------------------------------------------*/
602 
609 
616 
629 
636 
645 
646 /* UART FIFO functions ----------------------------------------------------------*/
654 
665 void IP_UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct);
666 
671 #ifdef __cplusplus
672 }
673 #endif
674 
675 #endif /* __USART_001_H_ */