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chip_lpc18xx.h
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1 /*
2  * @brief LPC18xx basic chip inclusion file
3  *
4  * Copyright(C) NXP Semiconductors, 2012
5  * All rights reserved.
6  *
7  * Software that is described herein is for illustrative purposes only
8  * which provides customers with programming information regarding the
9  * LPC products. This software is supplied "AS IS" without any warranties of
10  * any kind, and NXP Semiconductors and its licensor disclaim any and
11  * all warranties, express or implied, including all implied warranties of
12  * merchantability, fitness for a particular purpose and non-infringement of
13  * intellectual property rights. NXP Semiconductors assumes no responsibility
14  * or liability for the use of the software, conveys no license or rights under any
15  * patent, copyright, mask work right, or any other intellectual property rights in
16  * or to any products. NXP Semiconductors reserves the right to make changes
17  * in the software without notification. NXP Semiconductors also makes no
18  * representation or warranty that such application will be suitable for the
19  * specified use without further testing or modification.
20  *
21  * Permission to use, copy, modify, and distribute this software and its
22  * documentation is hereby granted, under NXP Semiconductors' and its
23  * licensor's relevant copyrights in the software, without fee, provided that it
24  * is used in conjunction with NXP Semiconductors microcontrollers. This
25  * copyright, permission, and disclaimer notice must appear in all copies of
26  * this code.
27  */
28 
29 #ifndef __CHIP_LPC18XX_H_
30 #define __CHIP_LPC18XX_H_
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
36 #include "lpc_types.h"
37 #include "sys_config.h"
38 
39 #ifndef CORE_M3
40 #error CORE_M3 is not defined for the LPC18xx architecture
41 #error CORE_M3 should be defined as part of your compiler define list
42 #endif
43 
44 #ifndef CHIP_LPC18XX
45 #error The LPC18XX Chip include path is used for this build, but
46 #error CHIP_LPC18XX is not defined!
47 #endif
48 
49 #include "adc_001.h"
50 #include "atimer_001.h"
51 #include "ccan_001.h"
52 #include "dac_001.h"
53 #include "emc_001.h"
54 #include "enet_001.h"
55 #include "gima_001.h"
56 #include "gpdma_001.h"
57 #include "gpiogrpint_001.h"
58 #include "gpiopinint_001.h"
59 #include "gpio_001.h"
60 #include "i2c_001.h"
61 #include "i2s_001.h"
62 #include "lcd_001.h"
63 #include "mcpwm_001.h"
64 #include "pmc_001.h"
65 #include "qei_001.h"
66 #include "regfile_001.h"
67 #include "ritimer_001.h"
68 #include "rtc_001.h"
69 #include "sct_001.h"
70 #include "sdmmc_001.h"
71 #include "ssp_001.h"
72 #include "timer_001.h"
73 #include "usart_001.h"
74 #include "usbhs_001.h"
75 #include "wwdt_001.h"
76 #include "spifi_001.h"
77 #include "rgu_18xx_43xx.h"
78 #include "cguccu_18xx_43xx.h"
79 
85 #define LPC_SCT_BASE 0x40000000
86 #define LPC_GPDMA_BASE 0x40002000
87 #define LPC_SDMMC_BASE 0x40004000
88 #define LPC_EMC_BASE 0x40005000
89 #define LPC_USB0_BASE 0x40006000
90 #define LPC_USB1_BASE 0x40007000
91 #define LPC_LCD_BASE 0x40008000
92 #define LPC_ETHERNET_BASE 0x40010000
93 #define LPC_ATIMER_BASE 0x40040000
94 #define LPC_REGFILE_BASE 0x40041000
95 #define LPC_PMC_BASE 0x40042000
96 #define LPC_CREG_BASE 0x40043000
97 #define LPC_EVRT_BASE 0x40044000
98 #define LPC_RTC_BASE 0x40046000
99 #define LPC_CGU_BASE 0x40050000
100 #define LPC_CCU1_BASE 0x40051000
101 #define LPC_CCU2_BASE 0x40052000
102 #define LPC_RGU_BASE 0x40053000
103 #define LPC_WWDT_BASE 0x40080000
104 #define LPC_USART0_BASE 0x40081000
105 #define LPC_USART2_BASE 0x400C1000
106 #define LPC_USART3_BASE 0x400C2000
107 #define LPC_UART1_BASE 0x40082000
108 #define LPC_SSP0_BASE 0x40083000
109 #define LPC_SSP1_BASE 0x400C5000
110 #define LPC_TIMER0_BASE 0x40084000
111 #define LPC_TIMER1_BASE 0x40085000
112 #define LPC_TIMER2_BASE 0x400C3000
113 #define LPC_TIMER3_BASE 0x400C4000
114 #define LPC_SCU_BASE 0x40086000
115 #define LPC_GPIO_PIN_INT_BASE 0x40087000
116 #define LPC_GPIO_GROUP_INT0_BASE 0x40088000
117 #define LPC_GPIO_GROUP_INT1_BASE 0x40089000
118 #define LPC_MCPWM_BASE 0x400A0000
119 #define LPC_I2C0_BASE 0x400A1000
120 #define LPC_I2C1_BASE 0x400E0000
121 #define LPC_I2S0_BASE 0x400A2000
122 #define LPC_I2S1_BASE 0x400A3000
123 #define LPC_C_CAN1_BASE 0x400A4000
124 #define LPC_RITIMER_BASE 0x400C0000
125 #define LPC_QEI_BASE 0x400C6000
126 #define LPC_GIMA_BASE 0x400C7000
127 #define LPC_DAC_BASE 0x400E1000
128 #define LPC_C_CAN0_BASE 0x400E2000
129 #define LPC_ADC0_BASE 0x400E3000
130 #define LPC_ADC1_BASE 0x400E4000
131 #define LPC_GPIO_PORT_BASE 0x400F4000
132 #define LPC_SPI_BASE 0x40100000
133 #define LPC_SGPIO_BASE 0x40101000
134 
135 /* Normalize types */
162 
163 #define LPC_SCT ((IP_SCT_001_Type *) LPC_SCT_BASE)
164 #define LPC_GPDMA ((IP_GPDMA_001_Type *) LPC_GPDMA_BASE)
165 #define LPC_SDMMC ((IP_SDMMC_001_Type *) LPC_SDMMC_BASE)
166 #define LPC_EMC ((IP_EMC_001_Type *) LPC_EMC_BASE)
167 #define LPC_USB0 ((IP_USBHS_001_Type *) LPC_USB0_BASE)
168 #define LPC_USB1 ((IP_USBHS_001_Type *) LPC_USB1_BASE)
169 #define LPC_LCD ((IP_LCD_001_Type *) LPC_LCD_BASE)
170 #define LPC_ETHERNET ((IP_ENET_001_Type *) LPC_ETHERNET_BASE)
171 #define LPC_ATIMER ((IP_ATIMER_001_Type *) LPC_ATIMER_BASE)
172 #define LPC_REGFILE ((IP_REGFILE_001_T *) LPC_REGFILE_BASE)
173 #define LPC_PMC ((IP_PMC_001_Type *) LPC_PMC_BASE)
174 #define LPC_EVRT ((LPC_EVRT_Type *) LPC_EVRT_BASE)
175 #define LPC_RTC ((IP_RTC_001_T *) LPC_RTC_BASE)
176 #define LPC_CGU ((LPC_CGU_T *) LPC_CGU_BASE)
177 #define LPC_CCU1 ((LPC_CCU1_Type *) LPC_CCU1_BASE)
178 #define LPC_CCU2 ((LPC_CCU2_Type *) LPC_CCU2_BASE)
179 #define LPC_CREG ((LPC_CREG_T *) LPC_CREG_BASE)
180 #define LPC_RGU ((LPC_RGU_T *) LPC_RGU_BASE)
181 #define LPC_WWDT ((IP_WWDT_001_Type *) LPC_WWDT_BASE)
182 #define LPC_USART0 ((IP_USART_001_Type *) LPC_USART0_BASE)
183 #define LPC_USART2 ((IP_USART_001_Type *) LPC_USART2_BASE)
184 #define LPC_USART3 ((IP_USART_001_Type *) LPC_USART3_BASE)
185 #define LPC_UART1 ((IP_USART_001_Type *) LPC_UART1_BASE)
186 #define LPC_SSP0 ((IP_SSP_001_Type *) LPC_SSP0_BASE)
187 #define LPC_SSP1 ((IP_SSP_001_Type *) LPC_SSP1_BASE)
188 #define LPC_TIMER0 ((IP_TIMER_001_Type *) LPC_TIMER0_BASE)
189 #define LPC_TIMER1 ((IP_TIMER_001_Type *) LPC_TIMER1_BASE)
190 #define LPC_TIMER2 ((IP_TIMER_001_Type *) LPC_TIMER2_BASE)
191 #define LPC_TIMER3 ((IP_TIMER_001_Type *) LPC_TIMER3_BASE)
192 #define LPC_SCU ((LPC_SCU_Type *) LPC_SCU_BASE)
193 #define LPC_GPIO_PIN_INT ((IP_GPIOPININT_001_Type *) LPC_GPIO_PIN_INT_BASE)
194 #define LPC_GPIO_GROUP_INT0 ((IP_GPIOGROUPINT_001_Type *) LPC_GPIO_GROUP_INT0_BASE)
195 #define LPC_GPIO_GROUP_INT1 ((IP_GPIOGROUPINT_001_Type *) LPC_GPIO_GROUP_INT1_BASE)
196 #define LPC_MCPWM ((IP_MCPWM_001_Type *) LPC_MCPWM_BASE)
197 #define LPC_I2C0 ((IP_I2C_001_Type *) LPC_I2C0_BASE)
198 #define LPC_I2C1 ((IP_I2C_001_Type *) LPC_I2C1_BASE)
199 #define LPC_I2S0 ((IP_I2S_001_Type *) LPC_I2S0_BASE)
200 #define LPC_I2S1 ((IP_I2S_001_Type *) LPC_I2S1_BASE)
201 #define LPC_C_CAN1 ((IP_CCAN_001_Type *) LPC_C_CAN1_BASE)
202 #define LPC_RITIMER ((IP_RITIMER_001_Type *) LPC_RITIMER_BASE)
203 #define LPC_QEI ((IP_QEI_001_Type *) LPC_QEI_BASE)
204 #define LPC_GIMA ((IP_GIMA_001_Type *) LPC_GIMA_BASE)
205 #define LPC_DAC ((IP_DAC_001_Type *) LPC_DAC_BASE)
206 #define LPC_C_CAN0 ((IP_CCAN_001_Type *) LPC_C_CAN0_BASE)
207 #define LPC_ADC0 ((IP_ADC_001_Type *) LPC_ADC0_BASE)
208 #define LPC_ADC1 ((IP_ADC_001_Type *) LPC_ADC1_BASE)
209 #define LPC_GPIO_PORT ((IP_GPIO_001_Type *) LPC_GPIO_PORT_BASE)
210 
215 #include "clock_18xx_43xx.h"
216 #include "gpio_18xx_43xx.h"
217 #include "uart_18xx_43xx.h"
218 #include "gpdma_18xx_43xx.h"
219 #include "enet_18xx_43xx.h"
220 #include "i2c_18xx_43xx.h"
221 #include "i2s_18xx_43xx.h"
222 #include "ssp_18xx_43xx.h"
223 #include "rtc_18xx_43xx.h"
224 #include "evrt_18xx_43xx.h"
225 #include "atimer_18xx_43xx.h"
226 #include "wwdt_18xx_43xx.h"
227 #include "ritimer_18xx_43xx.h"
228 #include "emc_18xx_43xx.h"
229 #include "lcd_18xx_43xx.h"
230 #include "adc_18xx_43xx.h"
231 #include "sdmmc_18xx_43xx.h"
232 #include "timer_18xx_43xx.h"
233 #include "creg_18xx_43xx.h"
234 #include "scu_18xx_43xx.h"
235 
236 #ifdef __cplusplus
237 }
238 #endif
239 
240 #endif /* __CHIP_LPC18XX_H_ */