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gpdma_18xx_43xx.h
Go to the documentation of this file.
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/*
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* @brief LPC18xx/43xx DMA driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __GPDMA_18XX_43XX_H_
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#define __GPDMA_18XX_43XX_H_
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#include "
chip.h
"
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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#define GPDMA_NUMBER_CHANNELS 8
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#define GPDMA_CONN_MEMORY ((0UL))
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#define GPDMA_CONN_MAT0_0 ((1UL))
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#define GPDMA_CONN_UART0_Tx ((2UL))
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#define GPDMA_CONN_MAT0_1 ((3UL))
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#define GPDMA_CONN_UART0_Rx ((4UL))
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#define GPDMA_CONN_MAT1_0 ((5UL))
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#define GPDMA_CONN_UART1_Tx ((6UL))
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#define GPDMA_CONN_MAT1_1 ((7UL))
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#define GPDMA_CONN_UART1_Rx ((8UL))
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#define GPDMA_CONN_MAT2_0 ((9UL))
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#define GPDMA_CONN_UART2_Tx ((10UL))
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#define GPDMA_CONN_MAT2_1 ((11UL))
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#define GPDMA_CONN_UART2_Rx ((12UL))
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#define GPDMA_CONN_MAT3_0 ((13UL))
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#define GPDMA_CONN_UART3_Tx ((14UL))
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#define GPDMA_CONN_SCT_0 ((15UL))
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#define GPDMA_CONN_MAT3_1 ((16UL))
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#define GPDMA_CONN_UART3_Rx ((17UL))
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#define GPDMA_CONN_SCT_1 ((18UL))
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#define GPDMA_CONN_SSP0_Rx ((19UL))
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#define GPDMA_CONN_I2S_Tx_Channel_0 ((20UL))
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#define GPDMA_CONN_SSP0_Tx ((21UL))
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#define GPDMA_CONN_I2S_Rx_Channel_1 ((22UL))
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#define GPDMA_CONN_SSP1_Rx ((23UL))
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#define GPDMA_CONN_SSP1_Tx ((24UL))
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#define GPDMA_CONN_ADC_0 ((25UL))
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#define GPDMA_CONN_ADC_1 ((26UL))
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#define GPDMA_CONN_DAC ((27UL))
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#define GPDMA_CONN_I2S_Tx_Channel_1 ((28UL))
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#define GPDMA_CONN_I2S_Rx_Channel_0 ((29UL))
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#define GPDMA_BSIZE_1 ((0UL))
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#define GPDMA_BSIZE_4 ((1UL))
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#define GPDMA_BSIZE_8 ((2UL))
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#define GPDMA_BSIZE_16 ((3UL))
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#define GPDMA_BSIZE_32 ((4UL))
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#define GPDMA_BSIZE_64 ((5UL))
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#define GPDMA_BSIZE_128 ((6UL))
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#define GPDMA_BSIZE_256 ((7UL))
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#define GPDMA_WIDTH_BYTE ((0UL))
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#define GPDMA_WIDTH_HALFWORD ((1UL))
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#define GPDMA_WIDTH_WORD ((2UL))
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#define DMA_CONTROLLER 0
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#define SRC_PER_CONTROLLER 1
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#define DST_PER_CONTROLLER 2
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typedef struct {
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FunctionalState
ChannelStatus
;
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}
DMA_ChannelHandle_t
;
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#define Chip_GPDMA_IntGetStatus(type, channel) IP_GPDMA_IntGetStatus(LPC_GPDMA, type, channel)
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#define Chip_GPDMA_ClearIntPending(type, channel) IP_GPDMA_ClearIntPending(LPC_GPDMA, type, channel)
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#define Chip_GPDMA_ChannelCmd(channelNum, NewState) IP_GPDMA_ChannelCmd(LPC_GPDMA, channelNum, NewState)
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void
Chip_GPDMA_Init
(
void
);
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void
Chip_DMA_Stop
(uint8_t ChannelNum);
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Status
Chip_DMA_Interrupt
(uint8_t ChannelNum);
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uint8_t
Chip_DMA_GetFreeChannel
(
uint32_t
PeripheralConnection_ID);
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void
Chip_DMA_Transfer
(uint8_t ChannelNum,
uint32_t
src,
uint32_t
dst,
FlowControlType
TransferType,
uint32_t
Size
);
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#ifdef __cplusplus
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}
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#endif
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#endif
/* __GPDMA_18XX_43XX_H_ */
software
lpc_core
lpc_chip
chip_18xx_43xx
gpdma_18xx_43xx.h
Generated on Fri Nov 16 2012 13:36:41 for LPCOpen Platform by
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