65 #ifndef __ENDPOINT_LPC18XX_H__
66 #define __ENDPOINT_LPC18XX_H__
68 #include "../EndpointCommon.h"
71 #if defined(__cplusplus)
76 #if !defined(__INCLUDE_FROM_USB_DRIVER)
77 #error Do not include this file directly. Include lpcroot/libraries/LPCUSBlib/Drivers/USB/USB.h instead.
81 #if !defined(__DOXYGEN__)
83 #define ENDPOINT_DETAILS_MAXEP 6
85 #if defined(USB_DEVICE_ROM_DRIVER)
97 const unsigned p_spifi;
98 const unsigned p_usbd;
103 #define ROM_FUNCTION_TABLE_PTR_ADDR (0x10400104UL)
104 #define ROM_USBD_PTR (((ROM_FUNCTION_TABLE *) (ROM_FUNCTION_TABLE_PTR_ADDR))->p_usbd)
106 #define ROMDRIVER_USB0_BASE LPC_USB0_BASE
107 #define ROMDRIVER_USB1_BASE LPC_USB1_BASE
108 #define ROMDRIVER_MEM_SIZE 0x1000
109 extern uint8_t usb_RomDriver_buffer[ROMDRIVER_MEM_SIZE];
111 #define ROMDRIVER_MSC_MEM_SIZE 0x1000
112 extern uint8_t usb_RomDriver_MSC_buffer[ROMDRIVER_MSC_MEM_SIZE];
114 #define ROMDRIVER_CDC_MEM_SIZE 0x800
115 extern uint8_t usb_RomDriver_CDC_buffer[ROMDRIVER_CDC_MEM_SIZE];
116 #define ROMDRIVER_CDC_DATA_BUFFER_SIZE 640
117 #if (USB_FORCED_FULLSPEED)
118 #define CDC_MAX_BULK_EP_SIZE 64
120 #define CDC_MAX_BULK_EP_SIZE 512
122 extern uint8_t UsbdCdc_EPIN_buffer[CDC_MAX_BULK_EP_SIZE];
123 extern uint8_t UsbdCdc_EPOUT_buffer[CDC_MAX_BULK_EP_SIZE];
125 #define ROMDRIVER_HID_MEM_SIZE 0x800
126 extern uint8_t usb_RomDriver_HID_buffer[ROMDRIVER_HID_MEM_SIZE];
134 #define USBCMD_D_RunStop (1 << 0)
135 #define USBCMD_D_Reset (1 << 1)
136 #define USBCMD_D_SetupTripWire (1 << 13)
137 #define USBCMD_D_AddTDTripWire (1 << 14)
138 #define USBCMD_D_IntThreshold (0xff << 16)
141 #define USBSTS_D_UsbInt 0x00000001UL
142 #define USBSTS_D_UsbErrorInt 0x00000002UL
143 #define USBSTS_D_PortChangeDetect 0x00000004UL
144 #define USBSTS_D_ResetReceived (1 << 6)
145 #define USBSTS_D_SofReceived (1 << 7)
146 #define USBSTS_D_SuspendInt (1 << 8)
147 #define USBSTS_D_NAK (1 << 16)
150 #define USBINTR_D_UsbIntEnable (1 << 0)
151 #define USBINTR_D_UsbErrorIntEnable (1 << 1)
152 #define USBINTR_D_PortChangeIntEnable (1 << 2)
153 #define USBINTR_D_UsbResetEnable (1 << 6)
154 #define USBINTR_D_SofReceivedEnable (1 << 7)
155 #define USBINTR_D_SuspendEnable (1 << 8)
156 #define USBINTR_D_NAKEnable (1 << 16)
159 #define DEVICEADDR_AddressAdvance (1 << 24)
160 #define DEVICEADDR_DeviceAddr (0xff << 25)
163 #define ENDPTNAK_RX (0x3f)
164 #define ENDPTNAK_TX (0x3f << 16)
167 #define ENDPTNAKEN_RX (0x3f)
168 #define ENDPTNAKEN_TX (0x3f << 16)
171 #define PORTSC_D_CurrentConnectStatus 0x00000001UL
172 #define PORTSC_D_ForcePortResume 0x00000040UL
173 #define PORTSC_D_PortSuspend 0x00000080UL
174 #define PORTSC_D_PortReset 0x00000100UL
175 #define PORTSC_D_HighSpeedStatus 0x00000200UL
176 #define PORTSC_D_PortIndicatorControl 0x0000C000UL
177 #define PORTSC_D_PortTestControl 0x000F0000UL
178 #define PORTSC_D_PhyClockDisable 0x00800000UL
179 #define PORTSC_D_PortForceFullspeedConnect 0x01000000UL
180 #define PORTSC_D_PortSpeed 0x0C000000UL
186 #define ENDPTPRIME_RX (0x3f)
187 #define ENDPTPRIME_TX (0x3f << 16)
190 #define ENDPTFLUSH_RX (0x3f)
191 #define ENDPTFLUSH_TX (0x3f << 16)
194 #define ENDPTSTAT_RX (0x3f)
195 #define ENDPTSTAT_TX (0x3f << 16)
198 #define ENDPTCOMPLETE_RX (0x3f)
199 #define ENDPTCOMPLETE_TX (0x3f << 16)
202 #define ENDPTCTRL_RxStall (1)
203 #define ENDPTCTRL_RxType (3 << 2)
204 #define ENDPTCTRL_RxToggleInhibit (1 << 5)
205 #define ENDPTCTRL_RxToggleReset (1 << 6)
206 #define ENDPTCTRL_RxEnable (1 << 7)
208 #define ENDPTCTRL_TxStall (1 << 16)
209 #define ENDPTCTRL_TxType (3 << 18)
210 #define ENDPTCTRL_TxToggleInhibit (1 << 21)
211 #define ENDPTCTRL_TxToggleReset (1 << 22)
212 #define ENDPTCTRL_TxEnable (1 << 23)
213 #define ENDPTCTRL_REG(LogicalAddr) ( ((__IO uint32_t *) &(USB_REG(USBPortNum)->ENDPTCTRL[0]))[ \
215 #define EP_Physical2Logical(n) ((n) / 2)
217 #define USED_PHYSICAL_ENDPOINTS (ENDPOINT_DETAILS_MAXEP * 2)
218 #define EP_Physical2BitPosition(n) ( EP_Physical2Logical(n) + ((n) % 2 ? 16 : 0 ) )
244 } DeviceTransferDescriptor, *PDeviceTransferDescriptor;
253 __IO
uint32_t ZeroLengthTermination : 1;
261 __IO DeviceTransferDescriptor overlay;
264 __IO uint8_t SetupPackage[8];
266 uint16_t TransferCount;
267 __IO uint16_t IsOutReceived;
269 } DeviceQueueHead, *PDeviceQueueHead;
276 uint16_t totalpackets, uint16_t dummypackets);
283 bool Endpoint_ConfigureEndpoint_Prv(
const uint8_t Number,
284 const uint8_t UECFG0XData,
285 const uint8_t UECFG1XData);
313 const uint8_t Banks) ;
470 (dQueueHead[PhyEP].overlay.Active == 0);
602 (ENDPTCTRL_RxStall | ENDPTCTRL_TxStall);
611 ENDPTCTRL_TxToggleReset;
630 #if (!defined(FIXED_CONTROL_ENDPOINT_SIZE) || defined(__DOXYGEN__))
633 #define USB_Device_ControlEndpointSize FIXED_CONTROL_ENDPOINT_SIZE
656 #if defined(__cplusplus)