ISF  2.2 rev 5
Intelligent Sensing Framework for Kinetis with Processor Expert
fxls8952.h
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1 /**
2  * @file fxls8952.h
3  * @brief The \b fxls8952.h contains the FXLS8952 Accelerometer register definitions, access macros, and
4  * device access functions.
5  *
6  * @copyright Copyright (c) 2015, Freescale Semiconductor, Inc.
7  */
8 
9 #ifndef FXLS8952_H_
10 #define FXLS8952_H_
11 
12 /**
13  * @brief The FXLS8952 types
14  */
15 
16 /**
17  **
18  ** @brief The FXLS8952 Sensor Internal Register Map.
19  */
20 enum {
69 };
70 
71 #define FXLS8952_WHOAMI_VALUE (0x72)
72 
73 /*
74  * General purpose macros to set/get a specific bit field within a register.
75  * The macro assumes that the root identifier for the field is a consistent character string (e.g., "BIT_FIELD").
76  * The bit field mask is the character string followed by "_MASK" (e.g., BIT_FIELD_MASK).
77  * The bit field shift is the character string followed by "_SHIFT" (e.g., BIT_FIELD_SHIFT).
78  */
79 #define FXLS8952_SET_FIELD(name,val) (((val)<<FXLS8952_##name##_SHIFT)&(FXLS8952_##name##_MASK))
80 #define FXLS8952_GET_FIELD(name,val) ((val&FXLS8952_##name##_MASK)>>FXLS8952_##name##_SHIFT)
81 
82 /*
83  ** INT_STATUS Register
84  */
85 #define FXLS8952_SRC_DRDY_MASK (0x80)
86 #define FXLS8952_SRC_DRDY_SHIFT 7
87 #define FXLS8952_SRC_OVF_MASK (0x40)
88 #define FXLS8952_SRC_OVF_SHIFT 6
89 #define FXLS8952_SRC_BUF_MASK (0x20)
90 #define FXLS8952_SRC_BUF_SHIFT 5
91 #define FXLS8952_SRC_SDCD_OR_MASK (0x10)
92 #define FXLS8952_SRC_SDCD_OR_SHIFT 4
93 #define FXLS8952_SRC_SDCD_AND_MASK (0x08)
94 #define FXLS8952_SRC_SDCD_AND_SHIFT 3
95 #define FXLS8952_SRC_ORIENT_MASK (0x04)
96 #define FXLS8952_SRC_ORIENT_SHIFT 2
97 #define FXLS8952_SRC_ASLP_MASK (0x02)
98 #define FXLS8952_SRC_ASLP_SHIFT 1
99 #define FXLS8952_SRC_BOOT_MASK (0x01)
100 #define FXLS8952_SRC_BOOT_SHIFT 0
101 
102 /*
103  ** BUF_STATUS Register
104  */
105 #define FXLS8952_BUF_WMRK_MASK (0x80)
106 #define FXLS8952_BUF_WMRK_SHIFT 7
107 #define FXLS8952_BUF_OVF_MASK (0x40)
108 #define FXLS8952_BUF_OVF_SHIFT 6
109 #define FXLS8952_BUF_CNT_MASK (0x3F)
110 #define FXLS8952_BUF_CNT_SHIFT 0
111 
112 /*
113  ** SYS_MODE Register
114  */
115 #define FXLS8952_BUF_GATE_ERR_MASK (0x80)
116 #define FXLS8952_BUF_GATE_ERR_SHIFT 7
117 #define FXLS8952_BUF_GATE_CNT_MASK (0x7C)
118 #define FXLS8952_BUF_GATE_CNT_SHIFT 2
119 #define FXLS8952_SYS_MODE_MASK (0x03)
120 #define FXLS8952_SYS_MODE_SHIFT 0
121 
122 /*
123  ** SENS_CONFIG1 Register
124  */
125 #define FXLS8952_RST_MASK (0x80)
126 #define FXLS8952_RST_SHIFT 7
127 #define FXLS8952_ST_AXIS_SEL_MASK (0x60)
128 #define FXLS8952_ST_AXIS_SEL_SHIFT 5
129 #define FXLS8952_ST_POL_MASK (0x10)
130 #define FXLS8952_ST_POL_SHIFT 4
131 #define FXLS8952_FSR_MASK (0x06)
132 #define FXLS8952_FSR_SHIFT 1
133 #define FXLS8952_ACTIVE_MASK (0x01)
134 #define FXLS8952_ACTIVE_SHIFT 0
135 
136 /*
137  ** SENS_CONFIG2 Register
138  */
139 #define FXLS8952_WAKE_PM_MASK (0xC0)
140 #define FXLS8952_WAKE_PM_SHIFT 6
141 #define FXLS8952_SLEEP_PM_MASK (0x30)
142 #define FXLS8952_SLEEP_PM_SHIFT 4
143 #define FXLS8952_LE_BE_MASK (0x08)
144 #define FXLS8952_LE_BE_SHIFT 3
145 #define FXLS8952_AINC_TEMP_MASK (0x02)
146 #define FXLS8952_AINC_TEMP_SHIFT 1
147 #define FXLS8952_F_READ_MASK (0x01)
148 #define FXLS8952_F_READ_SHIFT 0
149 
150 /*
151  ** SENS_CONFIG3 Register
152  */
153 #define FXLS8952_WAKE_ODR_MASK (0xF0)
154 #define FXLS8952_WAKE_ODR_SHIFT 4
155 #define FXLS8952_SLEEP_ODR_MASK (0x0F)
156 #define FXLS8952_SLEEP_ODR_SHIFT 0
157 
158 /*
159  ** SENS_CONFIG4 Register
160  */
161 #define FXLS8952_EXT_TRIG_M_MASK (0x80)
162 #define FXLS8952_EXT_TRIG_M_SHIFT 7
163 #define FXLS8952_WAKE_SDCD_WT_MASK (0x40)
164 #define FXLS8952_WAKE_SDCD_WT_SHIFT 6
165 #define FXLS8952_WAKE_SDCD_OT_MASK (0x20)
166 #define FXLS8952_WAKE_SDCD_OT_SHIFT 5
167 #define FXLS8952_WAKE_ORIENT_MASK (0x10)
168 #define FXLS8952_WAKE_ORIENT_SHIFT 4
169 #define FXLS8952_DRDY_PUL_MASK (0x08)
170 #define FXLS8952_DRDY_PUL_SHIFT 3
171 #define FXLS8952_INT2_FUNC_MASK (0x04)
172 #define FXLS8952_INT2_FUNC_SHIFT 2
173 #define FXLS8952_INT_PP_OD_MASK (0x02)
174 #define FXLS8952_INT_PP_OD_SHIFT 1
175 #define FXLS8952_INT_POL_MASK (0x01)
176 #define FXLS8952_INT_POL_SHIFT 0
177 
178 /*
179  ** INT_EN Register
180  */
181 #define FXLS8952_DRDY_EN_MASK (0x80)
182 #define FXLS8952_DRDY_EN_SHIFT 7
183 #define FXLS8952_BUF_EN_MASK (0x40)
184 #define FXLS8952_BUF_EN_SHIFT 6
185 #define FXLS8952_SDCD_OT_EN_MASK (0x20)
186 #define FXLS8952_SDCD_OT_EN_SHIFT 5
187 #define FXLS8952_SDCD_WT_EN_MASK (0x10)
188 #define FXLS8952_SDCD_WT_EN_SHIFT 4
189 #define FXLS8952_ORIENT_EN_MASK (0x08)
190 #define FXLS8952_ORIENT_EN_SHIFT 3
191 #define FXLS8952_ASLP_EN_MASK (0x04)
192 #define FXLS8952_ASLP_EN_SHIFT 2
193 #define FXLS8952_BOOT_DIS_MASK (0x02)
194 #define FXLS8952_BOOT_DIS_SHIFT 1
195 #define FXLS8952_WAKE_OUT_EN_MASK (0x01)
196 #define FXLS8952_WAKE_OUT_EN_SHIFT 0
197 
198 /*
199  ** INT_PIN_SEL Register
200  */
201 #define FXLS8952_DRDY_INT2_MASK (0x80)
202 #define FXLS8952_DRDY_INT2_SHIFT 7
203 #define FXLS8952_BUF_INT2_MASK (0x40)
204 #define FXLS8952_BUF_INT2_SHIFT 6
205 #define FXLS8952_SDCD_OT_INT2_MASK (0x20)
206 #define FXLS8952_SDCD_OT_INT2_SHIFT 5
207 #define FXLS8952_SDCD_WT_INT2_MASK (0x10)
208 #define FXLS8952_SDCD_WT_INT2_SHIFT 4
209 #define FXLS8952_ORIENT_INT2_MASK (0x08)
210 #define FXLS8952_ORIENT_INT2_SHIFT 3
211 #define FXLS8952_ASLP_INT2_MASK (0x04)
212 #define FXLS8952_ASLP_INT2_SHIFT 2
213 #define FXLS8952_BOOT_INT2_MASK (0x02)
214 #define FXLS8952_BOOT_INT2_SHIFT 1
215 #define FXLS8952_WAKE_OUT_INT2_MASK (0x01)
216 #define FXLS8952_WAKE_OUT_INT2_SHIFT 0
217 
218 /*
219  ** BUF_CONFIG1 Register
220  */
221 #define FXLS8952_BUF_TYPE_MASK (0x80)
222 #define FXLS8952_BUF_TYPE_SHIFT 7
223 #define FXLS8952_BUF_MODE_MASK (0x60)
224 #define FXLS8952_BUF_MODE_SHIFT 5
225 #define FXLS8952_BUF_GATE_MASK (0x10)
226 #define FXLS8952_BUF_GATE_SHIFT 4
227 #define FXLS8952_TRIG_SDCD_WT_MASK (0x08)
228 #define FXLS8952_TRIG_SDCD_WT_SHIFT 3
229 #define FXLS8952_TRIG_SDCD_OT_MASK (0x04)
230 #define FXLS8952_TRIG_SDCD_OT_SHIFT 2
231 #define FXLS8952_TRIG_ORIENT_MASK (0x01)
232 #define FXLS8952_TRIG_ORIENT_SHIFT 0
233 
234 /*
235  ** BUF_CONFIG2 Register
236  */
237 #define FXLS8952_BUF_FLUSH_MASK (0x80)
238 #define FXLS8952_BUF_FLUSH_SHIFT 7
239 #define FXLS8952_WAKE_SRC_BUF_MASK (0x40)
240 #define FXLS8952_WAKE_SRC_BUF_SHIFT 5
241 #define FXLS8952_BUF_CFG_WMRK_MASK (0x3F)
242 #define FXLS8952_BUF_CFG_WMRK_SHIFT 0
243 
244 /*
245  ** ORIENT_STATUS Register
246  */
247 #define FXLS8952_NEW_ORIENT_MASK (0x80)
248 #define FXLS8952_NEW_ORIENT_SHIFT 7
249 #define FXLS8952_LO_MASK (0x40)
250 #define FXLS8952_LO_SHIFT 6
251 #define FXLS8952_LAPO_MASK (0x06)
252 #define FXLS8952_LAPO_SHIFT 1
253 #define FXLS8952_BAFRO_MASK (0x01)
254 #define FXLS8952_BAFRO_SHIFT 0
255 
256 /*
257  ** ORIENT_CFG Register
258  */
259 #define FXLS8952_ORIENT_DBCNTM_MASK (0x80)
260 #define FXLS8952_ORIENT_DBCNTM_SHIFT 7
261 #define FXLS8952_ORIENT_ENABLE_MASK (0x40)
262 #define FXLS8952_ORIENT_ENABLE_SHIFT 6
263 
264 /*
265  ** ORIENT_DBCOUNT Register
266  */
267 #define FXLS8952_ORIENT_DBCOUNT_MASK (0xFF)
268 #define FXLS8952_ORIENT_DBCOUNT_SHIFT 0
269 
270 /*
271  ** ORIENT_BF_ZCOMP Register
272  */
273 #define FXLS8952_ORIENT_BKFR_MASK (0xC0)
274 #define FXLS8952_ORIENT_BKFR_SHIFT 6
275 #define FXLS8952_ORIENT_ZLOCK_MASK (0x07)
276 #define FXLS8952_ORIENT_ZLOCK_SHIFT 0
277 
278 /*
279  ** ORIENT_THS Register
280  */
281 #define FXLS8952_ORIENT_THS_MASK (0xF8)
282 #define FXLS8952_ORIENT_THS_SHIFT 3
283 #define FXLS8952_HYS_MASK (0x07)
284 #define FXLS8952_HYS_SHIFT 0
285 
286 /*
287  * SDCD_CONFIG1 Register
288  */
289 #define FXLS8952_OT_ELE_MASK (0x80)
290 #define FXLS8952_OT_ELE_SHIFT 7
291 #define FXLS8952_WT_ELE_MASK (0x40)
292 #define FXLS8952_WT_ELE_SHIFT 6
293 #define FXLS8952_X_OT_EN_MASK (0x20)
294 #define FXLS8952_X_OT_EN_SHIFT 5
295 #define FXLS8952_Y_OT_EN_MASK (0x10)
296 #define FXLS8952_Y_OT_EN_SHIFT 4
297 #define FXLS8952_Z_OT_EN_MASK (0x08)
298 #define FXLS8952_Z_OT_EN_SHIFT 3
299 #define FXLS8952_X_WT_EN_MASK (0x04)
300 #define FXLS8952_X_WT_EN_SHIFT 2
301 #define FXLS8952_Y_WT_EN_MASK (0x02)
302 #define FXLS8952_Y_WT_EN_SHIFT 1
303 #define FXLS8952_Z_WT_EN_MASK (0x01)
304 #define FXLS8952_Z_WT_EN_SHIFT 0
305 
306 
307 /*
308  * SDCD_CONFIG2 Register
309  */
310 #define FXLS8952_SDCD_EN_MASK (0x80)
311 #define FXLS8952_SDCD_EN_SHIFT 7
312 #define FXLS8952_REF_UPDM_MASK (0x60)
313 #define FXLS8952_REF_UPDM_SHIFT 5
314 #define FXLS8952_OT_DBCTM_MASK (0x10)
315 #define FXLS8952_OT_DBCTM_SHIFT 4
316 #define FXLS8952_WT_DBCTM_MASK (0x08)
317 #define FXLS8952_WT_DBCTM_SHIFT 3
318 #define FXLS8952_WT_LOG_SEL_MASK (0x04)
319 #define FXLS8952_WT_LOG_SEL_SHIFT 2
320 #define FXLS8952_REF_UPD_MASK (0x01)
321 #define FXLS8952_REF_UPD_SHIFT 0
322 
323 /*
324  * SDCD_LTHS_MSB Register
325  */
326 #define FXLS8952_SDCD_X_WT_EF_MASK (0x80)
327 #define FXLS8952_SDCD_X_WT_EF_SHIFT 7
328 #define FXLS8952_SDCD_Y_WT_EF_MASK (0x40)
329 #define FXLS8952_SDCD_Y_WT_EF_SHIFT 6
330 #define FXLS8952_SDCD_Z_WT_EF_MASK (0x20)
331 #define FXLS8952_SDCD_Z_WT_EF_SHIFT 5
332 
333 /*
334  * Public Types
335  */
336 
337 
338 // Define the MMA865X functional interface status return type.
339 enum
340 {
344 };
345 
346 typedef struct
347 {
351 
352 typedef struct
353 {
355  boolean usesInterrupts;
357  boolean usesBuffer;
362 
363 #endif /* FXLS8952_H_ */
unsigned char uint8
Definition: isf_types.h:76
unsigned long int uint32
Definition: isf_types.h:78