12 #define MAG3110_IIC_ADDRESS 0x0E // MAG3110 I2C Address.
17 #define MAG3110_NUMBER_AXIS 0x3 // Number of Axis
18 #define MAG3110_NUMBER_BYTES_AXIS 0x2 // Number of bytes in each axis
52 #define MAG3110_SET_FIELD(name,val) (((val)<<MAG3110_##name##_SHIFT)&(MAG3110_##name##_MASK))
53 #define MAG3110_GET_FIELD(name,val) ((val&MAG3110_##name##_MASK)>>MAG3110_##name##_SHIFT)
58 #define MAG3110_ZYXOW_MASK (0x80)
59 #define MAG3110_ZYXOW_SHIFT 7
60 #define MAG3110_ZOW_MASK (0x40)
61 #define MAG3110_ZOW_SHIFT 6
62 #define MAG3110_YOW_MASK (0x20)
63 #define MAG3110_YOW_SHIFT 5
64 #define MAG3110_XOW_MASK (0x10)
65 #define MAG3110_XOW_SHIFT 4
66 #define MAG3110_ZYXDR_MASK (0x08)
67 #define MAG3110_ZYXDR_SHIFT 3
68 #define MAG3110_ZDR_MASK (0x04)
69 #define MAG3110_ZDR_SHIFT 2
70 #define MAG3110_YDR_MASK (0x02)
71 #define MAG3110_YDR_SHIFT 1
72 #define MAG3110_XDR_MASK (0x01)
73 #define MAG3110_XDR_SHIFT 0
78 #define MAG3110_SYSMOD1_MASK (0x02)
79 #define MAG3110_SYSMOD1_SHIFT 1
80 #define MAG3110_SYSMOD0_MASK (0x01)
81 #define MAG3110_SYSMOD0_SHIFT 0
86 #define MAG3110_DR_MASK (0xE0)
87 #define MAG3110_DR_SHIFT 5
88 #define MAG3110_OS_MASK (0x18)
89 #define MAG3110_OS_SHIFT 3
90 #define MAG3110_FR_MASK (0x04)
91 #define MAG3110_FR_SHIFT 2
92 #define MAG3110_TM_MASK (0x02)
93 #define MAG3110_TM_SHIFT 1
94 #define MAG3110_AC_MASK (0x01)
95 #define MAG3110_AC_SHIFT 0
100 #define MAG3110_AUTO_MRST_EN_MASK (0x80)
101 #define MAG3110_AUTO_MRST_EN_SHIFT 7
102 #define MAG3110_RAW_MASK (0x20)
103 #define MAG3110_RAW_SHIFT 5
104 #define MAG3110_MAG_RST_MASK (0x10)
105 #define MAG3110_MAG_RST_SHIFT 4
107 #define MAG3100_READ_BUF_SIZE (6)
108 #define NUMBER_OF_BYTES_TIMESTAMP (4)
109 #define MAG3110_WHOAMI_VALUE (0xC4)
114 #define MAG3110_STANDBY_TO_ACTIVE_SAMPLE_WAIT (2)
unsigned char uint8
This defines uint8 as unsigned char.
unsigned long uint32
This defines uint32 as unsigned long.
long int32
This defines int32 as long.
The structure defines the MAG3110 configuration.