123 #include "mqxlite_prv.h"
126 #include "UART_PDD.h"
134 #define AVAILABLE_EVENTS_MASK (LDD_SERIAL_ON_BLOCK_RECEIVED | LDD_SERIAL_ON_BLOCK_SENT)
165 DeviceDataPrv = &DeviceDataPrv__DEFAULT_RTOS_ALLOC;
179 DeviceDataPrv->
SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART0_RX_TX);
183 DeviceDataPrv->
SavedISRSettings.isrData = _int_get_isr_data(LDD_ivIndex_INT_UART0_ERR);
186 SIM_SCGC4 |= SIM_SCGC4_UART0_MASK;
188 SIM_SCGC5 |= SIM_SCGC5_PORTB_MASK;
190 PORTB_PCR16 = (uint32_t)((PORTB_PCR16 & (uint32_t)~(uint32_t)(
197 PORTB_PCR17 = (uint32_t)((PORTB_PCR17 & (uint32_t)~(uint32_t)(
204 NVICIP31 = NVIC_IP_PRI31(0x70);
206 NVICISER0 |= NVIC_ISER_SETENA(0x80000000);
208 NVICIP32 = NVIC_IP_PRI32(0x70);
210 NVICISER1 |= NVIC_ISER_SETENA(0x01);
211 UART_PDD_EnableTransmitter(UART0_BASE_PTR, PDD_DISABLE);
212 UART_PDD_EnableReceiver(UART0_BASE_PTR, PDD_DISABLE);
213 DeviceDataPrv->
SerFlag = 0x00U;
219 UART0_C4 = UART_C4_BRFA(0x00);
224 UART_PDD_SetBaudRateFineAdjust(UART0_BASE_PTR, 3u);
225 UART_PDD_SetBaudRate(UART0_BASE_PTR, 65U);
226 UART_PDD_EnableFifo(UART0_BASE_PTR, (UART_PDD_TX_FIFO_ENABLE | UART_PDD_RX_FIFO_ENABLE));
227 UART_PDD_FlushFifo(UART0_BASE_PTR, (UART_PDD_TX_FIFO_FLUSH | UART_PDD_RX_FIFO_FLUSH));
228 UART_PDD_EnableTransmitter(UART0_BASE_PTR, PDD_ENABLE);
229 UART_PDD_EnableReceiver(UART0_BASE_PTR, PDD_ENABLE);
230 UART_PDD_EnableInterrupt(UART0_BASE_PTR, ( UART_PDD_INTERRUPT_RECEIVER ));
232 PE_LDD_RegisterDeviceStructure(PE_LDD_COMPONENT_Serial_ISF_UART1_ID,DeviceDataPrv);
233 return ((LDD_TDeviceData *)DeviceDataPrv);
284 return ERR_PARAM_SIZE;
291 DeviceDataPrv->
InpDataPtr = (uint8_t*)BufferPtr;
343 return ERR_PARAM_SIZE;
350 DeviceDataPrv->
OutDataPtr = (uint8_t*)BufferPtr;
354 UART_PDD_EnableInterrupt(UART0_BASE_PTR, UART_PDD_INTERRUPT_TRANSMITTER);
372 register uint16_t Data;
374 Data = (uint16_t)UART_PDD_GetChar8(UART0_BASE_PTR);
376 *(DeviceDataPrv->
InpDataPtr++) = (uint8_t)Data;
399 UART_PDD_PutChar8(UART0_BASE_PTR, *(DeviceDataPrv->
OutDataPtr++));
406 UART_PDD_DisableInterrupt(UART0_BASE_PTR, UART_PDD_INTERRUPT_TRANSMITTER);
425 register uint32_t StatReg = UART_PDD_ReadInterruptStatusReg(UART0_BASE_PTR);
427 if (StatReg & (UART_S1_NF_MASK | UART_S1_OR_MASK | UART_S1_FE_MASK | UART_S1_PF_MASK)) {
428 (void)UART_PDD_GetChar8(UART0_BASE_PTR);
429 StatReg &= (uint32_t)(~(uint32_t)UART_S1_RDRF_MASK);
431 if (StatReg & UART_S1_RDRF_MASK) {
432 InterruptRx(DeviceDataPrv);
435 if (StatReg & UART_S1_TDRE_MASK) {
436 InterruptTx(DeviceDataPrv);
LDD_TError Serial_ISF_UART1_SendBlock(LDD_TDeviceData *DeviceDataPtr, LDD_TData *BufferPtr, uint16_t Size)
Sends a block of characters. The method returns ERR_BUSY when the previous block transmission is not ...
LDD_TDeviceData * Serial_ISF_UART1_Init(LDD_TUserData *UserDataPtr)
Initializes the device. Allocates memory for the device data structure, allocates interrupt vectors a...
Serial_ISF_UART1_TDeviceData * Serial_ISF_UART1_TDeviceDataPtr
LDD_TError Serial_ISF_UART1_ReceiveBlock(LDD_TDeviceData *DeviceDataPtr, LDD_TData *BufferPtr, uint16_t Size)
Specifies the number of data to receive. The method returns ERR_BUSY until the specified number of ch...
This component "Serial_LDD" implements an asynchronous serial communication. The component supports d...
LDD_RTOS_TISRVectorSettings SavedISRSettings
void Serial_ISF_UART1_OnBlockSent(LDD_TUserData *UserDataPtr)
void Serial_ISF_UART1_Interrupt(LDD_RTOS_TISRParameter _isrParameter)
LDD_TUserData * UserDataPtr
void Serial_ISF_UART1_OnBlockReceived(LDD_TUserData *UserDataPtr)