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PRODUCT BULLETIN
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ISSUE DATE:01-Aug-2014
NOTIFICATION:16355
TITLE:i.MX 6Quad/6Dual Errata Document Update
EFFECTIVE DATE:02-Aug-2014

DEVICE(S)
MPN
MCIMX6D4AVT08AC
MCIMX6D4AVT08ACR
MCIMX6D4AVT08AD
MCIMX6D4AVT08ADR
MCIMX6D4AVT10AC
MCIMX6D4AVT10ACR
MCIMX6D4AVT10AD
MCIMX6D4AVT10ADR
MCIMX6D5EYM10AC
MCIMX6D5EYM10ACR
MCIMX6D5EYM10AD
MCIMX6D5EYM10ADR
MCIMX6D5EYM12AC
MCIMX6D5EYM12AD
MCIMX6D6AVT08AC
MCIMX6D6AVT08ACR
MCIMX6D6AVT08AD
MCIMX6D6AVT08ADR
MCIMX6D6AVT10AC
MCIMX6D6AVT10ACR
MCIMX6D6AVT10AD
MCIMX6D6AVT10ADR
MCIMX6D7CVT08AC
MCIMX6D7CVT08AD
MCIMX6Q4AVT08AC
MCIMX6Q4AVT08ACR
MCIMX6Q4AVT08AD
MCIMX6Q4AVT08ADR
MCIMX6Q4AVT10AC
MCIMX6Q4AVT10ACR
MCIMX6Q4AVT10AD
MCIMX6Q4AVT10ADR
MCIMX6Q5EYM10AC
MCIMX6Q5EYM10ACR
MCIMX6Q5EYM10AD
MCIMX6Q5EYM10ADR
MCIMX6Q5EYM12AC
MCIMX6Q5EYM12AD
MCIMX6Q6AVT08AC
MCIMX6Q6AVT08ACR
MCIMX6Q6AVT08AD
MCIMX6Q6AVT08ADR
MCIMX6Q6AVT10AC
MCIMX6Q6AVT10ACR
MCIMX6Q6AVT10AD
MCIMX6Q6AVT10ADR
MCIMX6Q7CVT08AC
MCIMX6Q7CVT08AD
SC6Q888YM10AC



AFFECTED CHANGE CATEGORIES
  • ERRATA


  • DESCRIPTION OF CHANGE

    The i.MX 6Quad and i.MX 6Dual silicon errata documentation has been updated to include additional errata that have been identified.

    The updated errata documentation is attached to this notice and can be found at: http://www.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf

    Substantive changes in the errata are as follows:
    • Deleted the following errata:
    – ERR003742: This item was ARM erratum 732672. Access to this information must come directly from ARM.
    – ERR007005: This item was ARM erratum 791420. Access to this information must come directly from ARM.
    • Added the following errata:
    – ERR007805 “I2C: When the I2C clock speed is configured for 400 kHz, the SCL low period violates the I2C specification"
    – ERR008001 “GPMI: GPMI does not support the Set Feature command in Toggle mode”
    – ERR008000 “ESAI: ESAI may encounter channel swap when overrun/underrun occurs”
    – ERR007554 “PCIe: MSI Mask Register Reserved Bits not read-only”
    – ERR007926 “ROM: 32 kHz internal oscillator timing inaccuracy may affect SD/MMC, NAND, and OneNAND boot”
    – ERR007966 “SATA: SATA speed negotiation fails after suspend and resume"
     
    Refer to the document revision history for detailed information.



    REASON FOR CHANGE

    The errata documentation for i.MX 6Quad and i.MX 6Dual product lines has been updated.



    ANTICIPATED IMPACT OF PRODUCT CHANGE(FORM, FIT, FUNCTION, OR RELIABILITY)

    The errata describe existing conditions identified on current production devices. There are potential hardware and/or software implications to customers.




    NOTE:
    THE CHANGE(S) SPECIFIED IN THIS NOTIFICATION WILL BE IMPLEMENTED ON THE EFFECTIVE DATE LISTED ABOVE. To request further data or inquire about the notification, please enter a Service Request

    For sample inquiries - please go to www.freescale.com

    QUAL DATA AVAILABILITY DATE:     25-Jul-2014

    QUALIFICATION STATUS:     N/A

    QUALIFICATION PLAN:

        N/A

    RELIABILITY DATA SUMMARY:

        N/A

    ELECTRICAL CHARACTERISTIC SUMMARY:

        N/A


    CHANGED PART IDENTIFICATION:

        N/A



    ATTACHMENT(S):
    External attachment(s) FOR this notification can be viewed AT:
    16355_IMX6DQCE.pdf