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MKM34Z256VLx7 Bare Metal Software Drivers
R4.1.6
Reference Manual
|
List of output channels.
Macros | |
| #define | XBAR_DMA0 |
| XBAR DMA request or Interrupt 0. | |
| #define | XBAR_DMA1 |
| XBAR DMA request or Interrupt 1. | |
| #define | XBAR_DMA2 |
| XBAR DMA request or Interrupt 2. | |
| #define | XBAR_DMA3 |
| XBAR DMA request or Interrupt 3. | |
| #define | XBAR_CMP2INP |
| CMP2 Sample Window input. | |
| #define | XBAR_TMR0SEC |
| Quad Timer channel 0 secondary input. | |
| #define | XBAR_TMR1SEC |
| Quad Timer channel 1 secondary input. | |
| #define | XBAR_TMR2SEC |
| Quad Timer channel 2 secondary input. | |
| #define | XBAR_TMR3SEC |
| Quad Timer channel 3 secondary input. | |
| #define | XBAR_TMRPRI1 |
| Quad Timer primary clock input 1. | |
| #define | XBAR_TMRPRI2 |
| Quad Timer primary clock input 2. | |
| #define | XBAR_CMP0INP |
| CMP0 Sample Window input. | |
| #define | XBAR_CMP1INP |
| CMP1 Sample Window input. | |
| #define | XBAR_UARTRXINP |
| UART Rx Input. | |
| #define | XBAR_UARTTXMOD |
| UART Tx Modulation Output. | |
| #define | XBAR_ADCTRGCHA |
| ADC trigger select A pulse. | |
| #define | XBAR_ADCTRGCHB |
| ADC trigger select B pulse. | |
| #define | XBAR_OUT0 |
| XBAR Output pin 0. | |
| #define | XBAR_OUT1 |
| XBAR Output pin 1. | |
| #define | XBAR_OUT2 |
| XBAR Output pin 2. | |
| #define | XBAR_OUT3 |
| XBAR Output pin 3. | |
| #define | XBAR_OUT4 |
| XBAR Output pin 4. | |
| #define | XBAR_OUT5 |
| XBAR Output pin 5. | |
| #define | XBAR_OUT6 |
| XBAR Output pin 6. | |
| #define | XBAR_OUT7 |
| XBAR Output pin 7. | |
| #define | XBAR_OUT8 |
| XBAR Output pin 8. | |
| #define | XBAR_ADCTRGCHC |
| ADC trigger select C pulse. | |
| #define | XBAR_ADCTRGCHD |
| ADC trigger select D pulse. | |
| #define | XBAR_AFE0TRG |
| AFE Channel 0 Trigger. | |
| #define | XBAR_AFE1TRG |
| AFE Channel 1 Trigger. | |
| #define | XBAR_AFE2TRG |
| AFE Channel 2 Trigger. | |
| #define | XBAR_AFE3TRG |
| AFE Channel 3 Trigger. | |
| #define | XBAR_EWMIN |
| EWM input (EWM_IN) | |
| #define | XBAR_OUT9 |
| XBAR Output pin 9. | |
| #define | XBAR_OUT10 |
| XBAR Output pin 10. | |
| #define | XBAR_PDBPTRG0A |
| PDB0 Pre-trigger0 B2B Ack. | |
| #define | XBAR_PDBPTRG1A |
| PDB0 Pre-trigger1 B2B Ack. | |
| #define | XBAR_PDBPTRG2A |
| PDB0 Pre-trigger2 B2B Ack. | |
| #define | XBAR_PDBPTRG3A |
| PDB0 Pre-trigger3 B2B Ack. | |
| #define | XBAR_PDBXBTRG |
| PDB0 Trigger Input14. | |
| #define | XBAR_AFE0MDAT |
| AFE channel 0 external modulator data input. | |
| #define | XBAR_AFE1MDAT |
| AFE channel 1 external modulator data input. | |
| #define | XBAR_AFE2MDAT |
| AFE channel 2 external modulator data input. | |
| #define | XBAR_AFE3MDAT |
| AFE channel 3 external modulator data input. | |