PDB Module Configuration Structures

Overview

This section describes default configuration structures for PDB module. Create a new configuration structure if default ones don't initialize on-chip peripheral in required operating mode (see Creating Configuration Structure).

Macros
#define	PDB_MODULE_DEFAULT_CONFIG
	Default PDB configuration - PDB disabled. More...
#define	PDB_MODULE_SWTRG_ONESHOT_CONFIG(presc, mult, modulo, idly)
	PBD init with SW trigger. More...
#define	PDB_MODULE_SWTRG_CONT_CONFIG(presc, mult, modulo, idly)
	PBD init with SW trigger. More...
#define	PDB_MODULE_SWTRG_ONESHOT_IRQ_CONFIG(presc, mult, modulo, idly)
	PBD init with SW trigger. More...
#define	PDB_MODULE_SWTRG_CONT_IRQ_CONFIG(presc, mult, modulo, idly)
	PBD init with SW trigger. More...
#define	PDB_MODULE_SWTRG_ONESHOT_DMA_CONFIG(presc, mult, modulo, idly)
	PBD init with SW trigger. More...
#define	PDB_MODULE_SWTRG_CONT_DMA_CONFIG(presc, mult, modulo, idly)
	PBD init with SW trigger. More...
#define	PDB_MODULE_HWTRG_ONESHOT_CONFIG(trgs, presc, mult, modulo, idly)
	PBD init with HW trigger. More...
#define	PDB_MODULE_HWTRG_CONT_CONFIG(trgs, presc, mult, modulo, idly)
	PBD init with HW trigger. More...
#define	PDB_MODULE_HWTRG_ONESHOT_IRQ_CONFIG(trgs, presc, mult, modulo, idly)
	PBD init with HW trigger. More...
#define	PDB_MODULE_HWTRG_CONT_IRQ_CONFIG(trgs, presc, mult, modulo, idly)
	PBD init with HW trigger. More...
#define	PDB_MODULE_HWTRG_ONESHOT_DMA_CONFIG(trgs, presc, mult, modulo, idly)
	PBD init with HW trigger. More...
#define	PDB_MODULE_HWTRG_CONT_DMA_CONFIG(trgs, presc, mult, modulo, idly)
	PBD init with HW trigger. More...

Macro Definition Documentation

#define PDB_MODULE_DEFAULT_CONFIG

Value:

(tPDB){                                                                       \
/* SC   */   SET(PDB_SC_LDMOD(0))|CLR(PDB_SC_PDBEIE_MASK)|                    \
/* .... */   CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                  \
/* .... */   SET(PDB_SC_PRESCALER(0))|SET(PDB_SC_TRGSEL(0))|                  \
/* .... */   CLR(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                   \
/* .... */   SET(PDB_SC_MULT(0))|CLR(PDB_SC_CONT_MASK)|CLR(PDB_SC_LDOK_MASK), \
/* MOD  */   0l,                                                              \
/* IDLY */   0l,                                                              \
}

Default PDB configuration - PDB disabled.

#define PDB_MODULE_SWTRG_ONESHOT_CONFIG	(		presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(15))|               \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|CLR(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, SW trigger is enabled, interrupt is disabled, DMA is disabled, PDB is enabled, one-shot mode is configured.

Parameters

presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_SWTRG_CONT_CONFIG	(		presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(15))|               \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|SET(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, SW trigger is enabled, interrupt is disabled, DMA is disabled, PDB is enabled, continuous mode is configured.

Parameters

presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_SWTRG_ONESHOT_IRQ_CONFIG	(		presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(15))|               \
/* .... */ SET(PDB_SC_PDBEN_MASK)|SET(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|CLR(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, SW trigger is enabled, interrupt is enabled, DMA is disabled, PDB is enabled, one-shot mode is configured.

Parameters

presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_SWTRG_CONT_IRQ_CONFIG	(		presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(15))|               \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|SET(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, SW trigger is enabled, interrupt is enabled, DMA is disabled, PDB is enabled, continuous mode is configured.

Parameters

presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_SWTRG_ONESHOT_DMA_CONFIG	(		presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|SET(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(15))|               \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|CLR(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, SW trigger is enabled, interrupt is disabled, DMA is enabled, PDB is enabled, one-shot mode is configured.

Parameters

presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_SWTRG_CONT_DMA_CONFIG	(		presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|SET(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(15))|               \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|SET(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, SW trigger is enabled, interrupt is disabled, DMA is enabled, PDB is enabled, continuous mode is configured.

Parameters

presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_HWTRG_ONESHOT_CONFIG	(		trgs,
			presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(trgs))|             \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|CLR(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, HW trigger is enabled, interrupt is disabled, DMA is disabled, PDB is enabled, one-shot mode is configured.

Parameters

trgs	Select one of the PDB Trigger Input Sources.
presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_HWTRG_CONT_CONFIG	(		trgs,
			presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(trgs))|             \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|SET(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, HW trigger is enabled, interrupt is disabled, DMA is disabled, PDB is enabled, continuous mode is configured.

Parameters

trgs	Select one of the PDB Trigger Input Sources.
presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_HWTRG_ONESHOT_IRQ_CONFIG	(		trgs,
			presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(trgs))|             \
/* .... */ SET(PDB_SC_PDBEN_MASK)|SET(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|CLR(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, HW trigger is enabled, interrupt is enabled, DMA is disabled, PDB is enabled, one-shot mode is configured.

Parameters

trgs	Select one of the PDB Trigger Input Sources.
presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_HWTRG_CONT_IRQ_CONFIG	(		trgs,
			presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|CLR(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(trgs))|             \
/* .... */ SET(PDB_SC_PDBEN_MASK)|SET(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|SET(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, HW trigger is enabled, interrupt is enabled, DMA is disabled, PDB is enabled, continuous mode is configured.

Parameters

trgs	Select one of the PDB Trigger Input Sources.
presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_HWTRG_ONESHOT_DMA_CONFIG	(		trgs,
			presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|SET(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(trgs))|             \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|CLR(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, HW trigger is enabled, interrupt is disabled, DMA is enabled, PDB is enabled, one-shot mode is configured.

Parameters

trgs	Select one of the PDB Trigger Input Sources.
presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).

#define PDB_MODULE_HWTRG_CONT_DMA_CONFIG	(		trgs,
			presc,
			mult,
			modulo,
			idly
	)

Value:

(tPDB){                                                                       \
/* SC   */ SET(PDB_SC_LDMOD(1))|CLR(PDB_SC_PDBEIE_MASK)|                      \
/* .... */ CLR(PDB_SC_SWTRIG_MASK)|SET(PDB_SC_DMAEN_MASK)|                    \
/* .... */ SET(PDB_SC_PRESCALER(presc))|SET(PDB_SC_TRGSEL(trgs))|             \
/* .... */ SET(PDB_SC_PDBEN_MASK)|CLR(PDB_SC_PDBIE_MASK)|                     \
/* .... */ SET(PDB_SC_MULT(mult))|SET(PDB_SC_CONT_MASK)|SET(PDB_SC_LDOK_MASK),\
/* MOD  */ modulo,                                                            \
/* IDLY */ idly,                                                              \
}

Delay registers are updated when the counter reaches the MOD register value, HW trigger is enabled, interrupt is disabled, DMA is enabled, PDB is enabled, continuous mode is configured.

Parameters

trgs	Select one of the PDB Trigger Input Sources.
presc	Select one of the PDB Prescaler Dividers.
mult	Select one of the PDB Prescaler Multiplication Factors.
modulo	PDB modulus (0 - 65535).
idly	PDB interrupt delay (0 - 65535).