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MKMxxZxxACxx5 Bare Metal Software Drivers
R4.1.6
Reference Manual
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MKMxxZxxACxx5 Bare Metal Software Drivers
R4.1.6
Reference Manual
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This section describes use of each I/O macro. All logical operations, which destination peripheral register address reg is in peripheral address space [0x4000_0000-0x4007_FFFF] are accelerated by the Bit Manipulation Engine (BME). The core platform's Bit Manipulation Engine (BME) provides hardware support for atomic read-modify-write memory operations to the peripheral address space. Supported logical operations:
| Basic operations | AND | OR | XOR | Set | Clear | Toggle | Insert | Load-and-Clear | Load-and-Store | Extract |
|---|---|---|---|---|---|---|---|---|---|---|
| byte (8-bit) | ioandb | ioorb | ioxorb | iosetb | ioclrb | iotglb | iobfib | iolac1b | iolas1b | iobfxb |
| halfword (16-bit) | ioandh | ioorh | ioxorh | ioseth | ioclrh | iotglh | iobfih | iolac1h | iolas1h | iobfxh |
| word (32-bit) | ioandw | ioorw | ioxorw | iosetw | ioclrw | iotglw | iobfiw | iolac1w | iolas1w | iobfxw |
Macros | |
| #define | ioandb(reg, val) |
| Performs a bit-wise AND operation on byte (8-bit) peripheral register. More... | |
| #define | ioandh(reg, val) |
| Performs a bit-wise AND operation on halfword (16-bit) peripheral register. More... | |
| #define | ioandw(reg, val) |
| Performs a bit-wise AND operation on word (32-bit) peripheral register. More... | |
| #define | ioorb(reg, val) |
| Performs a bit-wise OR operation on byte (8-bit) peripheral register. More... | |
| #define | ioorh(reg, val) |
| Performs a bit-wise OR operation on halfword (16-bit) peripheral register. More... | |
| #define | ioorw(reg, val) |
| Performs a bit-wise OR operation on word (32-bit) peripheral register. More... | |
| #define | ioxorb(reg, val) |
| Performs a bit-wise XOR operation on byte (8-bit) peripheral register. More... | |
| #define | ioxorh(reg, val) |
| Performs a bit-wise XOR operation on halfword (16-bit) peripheral register. More... | |
| #define | ioxorw(reg, val) |
| Performs a bit-wise XOR operation on word (32-bit) peripheral register. More... | |
| #define | ioclrb(reg, val) |
| Clear bits in a byte (8-bit) peripheral register. More... | |
| #define | ioclrh(reg, val) |
| Clear bits in a halfword (16-bit) peripheral register. More... | |
| #define | ioclrw(reg, val) |
| Clear bits in a word (32-bit) peripheral register. More... | |
| #define | iosetb(reg, val) |
| Set bits in a byte (8-bit) peripheral register. More... | |
| #define | ioseth(reg, val) |
| Set bits in a halfword (16-bit) peripheral register. More... | |
| #define | iosetw(reg, val) |
| Set bits in a word (32-bit) peripheral register. More... | |
| #define | iotglb(reg, val) |
| Toggle bits in a byte (8-bit) peripheral register. More... | |
| #define | iotglh(reg, val) |
| Toggle bits in a halfword (16-bit) peripheral register. More... | |
| #define | iotglw(reg, val) |
| Toggle bits in a word (32-bit) peripheral register. More... | |
| #define | iobfib(reg, shift, width, val) |
| Performs a bit field insert BFI operation on byte (8-bit) peripheral register. More... | |
| #define | iobfih(reg, shift, width, val) |
| Performs a bit field insert BFI operation on halfword (16-bit) peripheral register. More... | |
| #define | iobfiw(reg, shift, width, val) |
| Performs a bit field insert BFI operation on word (32-bit) peripheral register. More... | |
| #define | iolac1b(reg, shift) |
| Returns a 1-bit field of the byte (8-bit) peripheral register and clears the same bit. More... | |
| #define | iolac1h(reg, shift) |
| Returns a 1-bit field of the halfword (16-bit) peripheral register and clears the same bit. More... | |
| #define | iolac1w(reg, shift) |
| Returns a 1-bit field of the word (32-bit) peripheral register and cleared the same bit. More... | |
| #define | iolas1b(reg, shift) |
| Returns a 1-bit field of the byte (8-bit) peripheral register and sets the same bit. More... | |
| #define | iolas1h(reg, shift) |
| Returns a 1-bit field of the halfword (16-bit) peripheral register and sets the same bit. More... | |
| #define | iolas1w(reg, shift) |
| Returns a 1-bit field of the word (32-bit) peripheral register and sets the same bit. More... | |
| #define | iobfxb(reg, shift, width) |
| Returns a bit field of the byte (8-bit) peripheral register. More... | |
| #define | iobfxh(reg, shift, width) |
| Returns a bit field of the halfword (16-bit) peripheral register. More... | |
| #define | iobfxw(reg, shift, width) |
| Returns a bit field of the word (32-bit) peripheral register. More... | |
| #define ioandb | ( | reg, | |
| val | |||
| ) |
The ioandb macro performs a bit-wise AND of the argument val and a byte (8-bit) register defined by the argument reg.
| reg | Byte (8-bit) peripheral register. |
| val | uint8 AND mask. |
| #define ioandh | ( | reg, | |
| val | |||
| ) |
The ioandh macro performs a bit-wise AND of the argument val and a halfword (8-bit) register defined by the argument reg.
| reg | Halfword (16-bit) peripheral register. |
| val | uint16 AND mask. |
| #define ioandw | ( | reg, | |
| val | |||
| ) |
The ioandw macro performs a bit-wise AND of the argument val and a word (32-bit) register defined by the argument reg.
| reg | Word (32-bit) peripheral register. |
| val | uint32 AND mask. |
| #define ioorb | ( | reg, | |
| val | |||
| ) |
The ioorb macro performs a bit-wise OR of the argument val OR a byte (8-bit) register defined by the argument reg.
| reg | Byte (8-bit) peripheral register. |
| val | uint8 OR mask. |
| #define ioorh | ( | reg, | |
| val | |||
| ) |
The ioorh macro performs a bit-wise OR of the argument val and a halfword (8-bit) register defined by the argument reg.
| reg | Halfword (16-bit) peripheral register. |
| val | uint16 OR mask. |
| #define ioorw | ( | reg, | |
| val | |||
| ) |
The ioorw macro performs a bit-wise OR of the argument val and a word (32-bit) register defined by the argument reg.
| reg | Word (32-bit) peripheral register. |
| val | uint32 OR mask. |
| #define ioxorb | ( | reg, | |
| val | |||
| ) |
The ioxorb macro performs a bit-wise XOR of the argument val XOR a byte (8-bit) register defined by the argument reg.
| reg | Byte (8-bit) peripheral register. |
| val | uint8 XOR mask. |
| #define ioxorh | ( | reg, | |
| val | |||
| ) |
The ioxorh macro performs a bit-wise XOR of the argument val and a halfword (8-bit) register defined by the argument reg.
| reg | Halfword (16-bit) peripheral register. |
| val | uint16 XOR mask. |
| #define ioxorw | ( | reg, | |
| val | |||
| ) |
The ioxorw macro performs a bit-wise XOR of the argument val and a word (32-bit) register defined by the argument reg.
| reg | Word (32-bit) peripheral register. |
| val | uint32 XOR mask. |
| #define ioclrb | ( | reg, | |
| val | |||
| ) |
The ioclrb macro clears bits, defined by argument val, in a byte (8-bit) peripheral register defined by argument reg.
| reg | Byte (8-bit) peripheral register. |
| val | uint8 bit mask. |
| #define ioclrh | ( | reg, | |
| val | |||
| ) |
The ioclrh macro clears bits, defined by argument val, in a halfword (16-bit) peripheral register defined by argument reg.
| reg | Halfword (16-bit) peripheral register. |
| val | uint16 bit mask. |
| #define ioclrw | ( | reg, | |
| val | |||
| ) |
The ioclrw macro clears bits, defined by argument val, in a word (32-bit) peripheral register defined by argument reg.
| reg | Word (32-bit) peripheral register. |
| val | uint32 bit mask. |
| #define iosetb | ( | reg, | |
| val | |||
| ) |
The iosetb macro sets bits, defined by argument val, in a byte (8-bit) peripheral register defined by argument reg.
| reg | Byte (8-bit) peripheral register. |
| val | uint8 bit mask. |
| #define ioseth | ( | reg, | |
| val | |||
| ) |
The ioseth macro sets bits, defined by argument val, in a halfword (16-bit) peripheral register defined by argument reg.
| reg | Halfword (16-bit) peripheral register. |
| val | uint16 bit mask. |
| #define iosetw | ( | reg, | |
| val | |||
| ) |
The iosetw macro sets bits, defined by argument val, in a word (32-bit) peripheral register defined by argument reg.
| reg | Word (32-bit) peripheral register. |
| val | uint32 bit mask. |
| #define iotglb | ( | reg, | |
| val | |||
| ) |
The iotglb macro toggles bits, defined by argument val, in a byte (8-bit) peripheral register defined by argument reg.
| reg | Byte (8-bit) peripheral register. |
| val | uint8 bit mask. |
| #define iotglh | ( | reg, | |
| val | |||
| ) |
The iotglh macro toggles bits, defined by argument val, in a halfword (16-bit) peripheral register defined by argument reg.
| reg | Halfword (16-bit) peripheral register. |
| val | uint16 bit mask. |
| #define iotglw | ( | reg, | |
| val | |||
| ) |
The iotglw macro toggles bits, defined by argument val, in a word (32-bit) peripheral register defined by argument reg.
| reg | Word (32-bit) peripheral register. |
| val | uint32 bit mask. |
| #define iobfib | ( | reg, | |
| shift, | |||
| width, | |||
| val | |||
| ) |
The iobfib macro inserts a bit field val of size width into a byte (8-bit) peripheral register defined by argument reg. The bit field is inserted into peripheral register reg starting at bit position defined by argument shift.
| reg | Byte (8-bit) peripheral register. |
| shift | Bit field position [0-7]. |
| width | Bit field size [1-8]. |
| val | uint8 bit field value. |
| #define iobfih | ( | reg, | |
| shift, | |||
| width, | |||
| val | |||
| ) |
The iobfih macro inserts a bit field val of size width into a halfword (16-bit) peripheral register defined by argument reg. The bit field is inserted into peripheral register reg starting at bit position defined by argument shift.
| reg | Halfword (16-bit) peripheral register. |
| shift | Bit field position [0-15]. |
| width | Bit field size [1-16]. |
| val | uint16 bit field value. |
| #define iobfiw | ( | reg, | |
| shift, | |||
| width, | |||
| val | |||
| ) |
The iobfiw macro inserts a bit field val of size width into a word (32-bit) peripheral register defined by argument reg. The bit field is inserted into peripheral register reg starting at bit position defined by argument shift.
| reg | Word (32-bit) peripheral register. |
| shift | Bit field position [0-31]. |
| width | Bit field size [1-16]. |
| val | uint16 bit field value. |
| #define iolac1b | ( | reg, | |
| shift | |||
| ) |
The iolac1b macro returns a right justified and zero filled 1-bit field from bit position defined by shift of a byte (8-bit) peripheral register defined by argument reg. The same bit is cleared.
| reg | Byte (8-bit) peripheral register. |
| shift | Bit field position [0-7]. |
| #define iolac1h | ( | reg, | |
| shift | |||
| ) |
The iolac1h macro returns a right justified and zero filled 1-bit field from bit position defined by shift of a halfword (16-bit) peripheral register defined by argument reg. The same bit is cleared.
| reg | Halfword (16-bit) peripheral register. |
| shift | Bit field position [0-15]. |
| #define iolac1w | ( | reg, | |
| shift | |||
| ) |
The iolac1w macro returns a right justified and zero filled 1-bit field from bit position defined by shift of a word (32-bit) peripheral register defined by argument reg. The same bit is cleared.
| reg | Word (32-bit) peripheral register. |
| shift | Bit field position [0-31]. |
| #define iolas1b | ( | reg, | |
| shift | |||
| ) |
The iolas1b macro returns a right justified and zero filled 1-bit field from bit position defined by shift of a byte (8-bit) peripheral register defined by argument reg. The same bit is set.
| reg | Byte (8-bit) peripheral register. |
| shift | Bit field position [0-7]. |
| #define iolas1h | ( | reg, | |
| shift | |||
| ) |
The iolas1h macro returns a right justified and zero filled 1-bit field from bit position defined by shift of a halfword (16-bit) peripheral register defined by argument reg. The same bit is set.
| reg | Halfword (16-bit) peripheral register. |
| shift | Bit field position [0-15]. |
| #define iolas1w | ( | reg, | |
| shift | |||
| ) |
The iolas1w macro returns a right justified and zero filled 1-bit field from bit position defined by shift of a word (32-bit) peripheral register defined by argument reg. The same bit is set.
| reg | Word (32-bit) peripheral register. |
| shift | Bit field position [0-31]. |
| #define iobfxb | ( | reg, | |
| shift, | |||
| width | |||
| ) |
The iobfxb macro returns a bit field of size width, from bit position defined by shift, of a byte (8-bit) peripheral register defined by argument reg.
| reg | Byte (8-bit) peripheral register. |
| shift | Bit field position [0-7]. |
| width | bit filed size [1-8]. |
| #define iobfxh | ( | reg, | |
| shift, | |||
| width | |||
| ) |
The iobfxh macro returns a bit field of size width, from bit position defined by shift, of a halfword (16-bit) peripheral register defined by argument reg.
| reg | Halfword (16-bit) peripheral register. |
| shift | Bit field position [0-15]. |
| width | bit filed size [1-16]. |
| #define iobfxw | ( | reg, | |
| shift, | |||
| width | |||
| ) |
The iobfxw macro returns a bit field of size width, from bit position defined by shift, of a word (32-bit) peripheral register defined by argument reg.
| reg | Word (32-bit) peripheral register. |
| shift | Bit field position [0-31]. |
| width | bit filed size [1-32]. |
