Overview

This section provide reference to the ARM Cortex®-M0+ platform macros and inline functions.

Macros
#define	NOP()
	No operation. More...

#define	EnableInterrupts()
	Enables all interrupts. More...

#define	DisableInterrupts()
	Disables all interrupts. More...

#define	SystemReset()
	Executes system reset. More...

#define	NVIC_SetIsr(src, ip)
	Enables interrupt request and sets its priority. More...

#define	NVIC_ClrIsr(src)
	Disables interrupt request. More...

#define	NVIC_CallIsr(src)
	Asserts interrupt request. More...

#define	NVIC_ClrPendingIsr(src)
	Deasserts pending bits for interrupt request. More...

#define	NVIC_GetPendingIsr(src)
	Returns pending interrupt state. More...

#define	NVIC_SetVectorTable(offset)
	Sets the Vector Table Offset Register (VTOR). More...

#define	FAULT_SetIsr(src, ip)
	Sets lower priority of the fault exceptions. More...

#define	GetMode()
	Returns current mode of execution. More...

#define	UserMode()
	Enters unprivileged (user) mode of execution. More...

#define	SpvrMode()
	Enters privileged (supervisor) mode of execution. More...

#define	SVC_Call(imm)
	Supervisor Call (SVC). More...

#define	SelPSP()
	Switches stack pointer to Process Stack Pointer (PSP). More...

#define	SelMSP()
	Switches stack pointer back to Main Stack Pointer (MSP). More...

#define	SVC_InstallCallback(ip, callback)
	Installs callback function for Supervisor Call (SVC) interrupt vector 11. More...

Functions
static uint32	GetIPSR (void)
	Returns state of Interrupt Program Status (IPSR) register. More...

static uint32	GetInterruptMask (void)
	Returns state of global interrupt disable bit from Priority Mask Register (PRIMASK). More...

static void	SetInterruptMask (register uint32 mask)
	Controls state of global interrupt disable bit in Priority Mask Register (PRIMASK). More...

static void	SetPSP (register uint32 value)
	Sets top of Process Stack Pointer (PSP). More...

static uint32	GetPSP (void)
	Gets Process Stack Pointer (PSP). More...

static void	SetMSP (register uint32 value)
	Sets top of Main Stack Pointer (MSP). More...

static uint32	GetMSP (void)
	Gets Main Stack Pointer (MSP). More...

void	arch_delay (long ticks)
	Delays software execution by number of core clock cycles. More...

Macro Definition Documentation

#define NOP ( )

This inline function performs no operation and is not guaranteed to be time consuming. The processor might remove it from the pipeline before it reaches the execution stage.

Note: Implemented as an inline function.

#define EnableInterrupts ( )

This macro enables all interrupts by clearing disable bit in Priority Mask Register (PRIMASK).

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, DisableInterrupts, NVIC_SetIsr, NVIC_ClrIsr, NVIC_CallIsr, GetIPSR, NVIC_ClrPendingIsr, NVIC_GetPendingIsr, FAULT_SetIsr

#define DisableInterrupts ( )

This macro disables all interrupts by setting disable bit in Priority Mask Register (PRIMASK).

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, EnableInterrupts, NVIC_SetIsr, NVIC_ClrIsr, NVIC_CallIsr, GetIPSR, NVIC_ClrPendingIsr, NVIC_GetPendingIsr, FAULT_SetIsr

#define SystemReset ( )

This macro executes system reset.

Note: Implemented as an inline macro.

#define NVIC_SetIsr	(	src,
		ip
	)

This macro enables interrupt request and sets its priority.

Parameters

src	Select interrupt request: INT_DMA0,INT_DMA1,INT_DMA2,INT_DMA3,INT_SPI0,INT_SPI1,INT_PMC, INT_QTIM0,INT_QTIM1,INT_QTIM2,INT_QTIM3,INT_PIT0_PIT1,INT_LLWU, INT_FTFA,INT_CMP0_CMP1,INT_LCD,INT_ADC,INT_PTx,INT_RNGA, INT_SCI0_SCI1,INT_SCI2_SCI3,INT_AFE0,INT_AFE1,INT_AFE2, INT_AFE3,INT_RTC,INT_I2C0_I2C1,INT_EWM,INT_MCG,INT_Watchdog, INT_LPTMR,INT_PXBAR.
ip	Select one of the ARM Cortex-M0+ Interrupt Priority Levels.

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, EnableInterrupts, DisableInterrupts, NVIC_ClrIsr, NVIC_CallIsr, GetIPSR, NVIC_ClrPendingIsr, NVIC_GetPendingIsr, FAULT_SetIsr

#define NVIC_ClrIsr ( src )

This macro disables interrupt request.

Parameters

src Select interrupt request: INT_DMA0,INT_DMA1,INT_DMA2,INT_DMA3,INT_SPI0,INT_SPI1,INT_PMC, INT_QTIM0,INT_QTIM1,INT_QTIM2,INT_QTIM3,INT_PIT0_PIT1,INT_LLWU, INT_FTFA,INT_CMP0_CMP1,INT_LCD,INT_ADC,INT_PTx,INT_RNGA, INT_SCI0_SCI1,INT_SCI2_SCI3,INT_AFE0,INT_AFE1,INT_AFE2, INT_AFE3,INT_RTC,INT_I2C0_I2C1,INT_EWM,INT_MCG,INT_Watchdog, INT_LPTMR,INT_PXBAR.

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, EnableInterrupts, DisableInterrupts, NVIC_SetIsr, NVIC_CallIsr, GetIPSR, NVIC_ClrPendingIsr, NVIC_GetPendingIsr, FAULT_SetIsr

#define NVIC_CallIsr ( src )

This macro asserts interrupt request.

Parameters

src Select interrupt request: INT_DMA0,INT_DMA1,INT_DMA2,INT_DMA3,INT_SPI0,INT_SPI1,INT_PMC, INT_QTIM0,INT_QTIM1,INT_QTIM2,INT_QTIM3,INT_PIT0_PIT1,INT_LLWU, INT_FTFA,INT_CMP0_CMP1,INT_LCD,INT_ADC,INT_PTx,INT_RNGA, INT_SCI0_SCI1,INT_SCI2_SCI3,INT_AFE0,INT_AFE1,INT_AFE2, INT_AFE3,INT_RTC,INT_I2C0_I2C1,INT_EWM,INT_MCG,INT_Watchdog, INT_LPTMR,INT_PXBAR.

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, EnableInterrupts, DisableInterrupts, NVIC_SetIsr, NVIC_ClrIsr, GetIPSR, NVIC_ClrPendingIsr, NVIC_GetPendingIsr, FAULT_SetIsr

#define NVIC_ClrPendingIsr ( src )

This macro deasserts pending bits for interrupt request.

Parameters

src Select interrupt request: INT_DMA0,INT_DMA1,INT_DMA2,INT_DMA3,INT_SPI0,INT_SPI1,INT_PMC, INT_QTIM0,INT_QTIM1,INT_QTIM2,INT_QTIM3,INT_PIT0_PIT1,INT_LLWU, INT_FTFA,INT_CMP0_CMP1,INT_LCD,INT_ADC,INT_PTx,INT_RNGA, INT_SCI0_SCI1,INT_SCI2_SCI3,INT_AFE0,INT_AFE1,INT_AFE2, INT_AFE3,INT_RTC,INT_I2C0_I2C1,INT_EWM,INT_MCG,INT_Watchdog, INT_LPTMR,INT_PXBAR.

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, EnableInterrupts, DisableInterrupts, NVIC_SetIsr, NVIC_ClrIsr, GetIPSR, NVIC_CallIsr, NVIC_GetPendingIsr, FAULT_SetIsr

#define NVIC_GetPendingIsr ( src )

This macro reads and returns pending interrupt state.

Parameters

src Select interrupt request: INT_DMA0,INT_DMA1,INT_DMA2,INT_DMA3,INT_SPI0,INT_SPI1,INT_PMC, INT_QTIM0,INT_QTIM1,INT_QTIM2,INT_QTIM3,INT_PIT0_PIT1,INT_LLWU, INT_FTFA,INT_CMP0_CMP1,INT_LCD,INT_ADC,INT_PTx,INT_RNGA, INT_SCI0_SCI1,INT_SCI2_SCI3,INT_AFE0,INT_AFE1,INT_AFE2, INT_AFE3,INT_RTC,INT_I2C0_I2C1,INT_EWM,INT_MCG,INT_Watchdog, INT_LPTMR,INT_PXBAR.

Returns: true (non-zero) interrupt is pending,; false interrupt is not pending.

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, EnableInterrupts, DisableInterrupts, NVIC_SetIsr, NVIC_ClrIsr, GetIPSR, NVIC_CallIsr, NVIC_ClrPendingIsr, FAULT_SetIsr

#define NVIC_SetVectorTable ( offset )

This macro sets the Vector Table Offset Register (VTOR).

Parameters

offset 32-bit vector table base offset value. This value must be a multiple of 0x100.

Note: Implemented as an inline macro.

#define FAULT_SetIsr	(	src,
		ip
	)

This macro sets lower priority of the selected fault exceptions. Fault exceptions have always the highest priority after reset.

Parameters

src	Select exception: INT_SVCall, INT_PendableSrvReq, INT_SysTick.
ip	Select one of the ARM Cortex-M0+ Interrupt Priority Levels.

Note: Implemented as an inline macro.

See also: GetInterruptMask, SetInterruptMask, EnableInterrupts, DisableInterrupts, NVIC_SetIsr, NVIC_ClrIsr, GetIPSR, NVIC_CallIsr, NVIC_ClrPendingIsr, NVIC_GetPendingIsr

#define GetMode ( )

This macro reads and returns current mode of execution.

Returns: true (non-zero) unprivileged (user) mode of execution,; false privileged (supervisor) mode of execution.

Note: Implemented as an inline macro.

See also: UserMode, SpvrMode, SVC_Call, SelPSP, SelMSP, SetPSP, SetMSP, GetPSP, GetMSP, SVC_InstallCallback

#define UserMode ( )

This macro enters unprivileged (user) mode of execution. It can be called from software running in privileged (supervisor) mode.

Note: Implemented as an inline macro.

See also: GetMode, SpvrMode, SVC_Call, SelPSP, SelMSP, SetPSP, SetMSP, GetPSP, GetMSP, SVC_InstallCallback

#define SpvrMode ( )

This macro enters privileged (supervisor) mode of execution. It can be called from software running in handler or privileged (supervisor) modes.

Note: Implemented as an inline macro.

Warning: Calling it from unprivileged (user) mode of execution causes not entering into privileged (supervisor) mode of execution. Call SVC_Call macro to switch from privileged to user mode.

See also: GetMode, UserMode, SVC_Call, SelPSP, SelMSP, SetPSP, SetMSP, GetPSP, GetMSP, SVC_InstallCallback

#define SVC_Call ( imm )

This macro performs Supervisor Call (SVC). It passes to the service routine an identifier (8-bit immediate value). Service routine always executes in handler mode.

Parameters

imm	8-bit identifier.

Note: Implemented as an inline macro. If required, the 8-bit identifier passed by this inline function can be retrieved by callback function installed by SVC_InstallCallback.