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00001 /******************************************************************************* 00002 * 00003 * Freescale Semiconductor Inc. 00004 * (c) Copyright 2004-2015 Freescale Semiconductor, Inc. 00005 * ALL RIGHTS RESERVED. 00006 * 00007 ****************************************************************************//*! 00008 * 00009 * @file etpu_crank.c 00010 * 00011 * @author Milan Brejl [r54529] 00012 * 00013 * @version 1.1 00014 * 00015 * @date 29-Jun-2015 00016 * 00017 * @brief This file contains API for using the eTPU function 00018 * Crank (CRANK). 00019 * 00020 ****************************************************************************//*! 00021 * 00022 * @mainpage 00023 * 00024 * The eTPU CRANK APIs @ref etpu_crank.c/.h includes API functions for eTPU 00025 * function CRANK, typically used together with CAM in an engine position system. 00026 * 00027 * The CRANK eTPU function uses 1 eTPU channel to process the tooth signal from a 00028 * crankshaft sensor and generate the eTPU-internal angle-base (TCR2). 00029 * The CRANK eTPU function uses the Enhanced Angle Counter (EAC) eTPU hardware. 00030 * The CRANK eTPU function can be assigned to one of: 00031 * - eTPU channel 0, input signal connected to TCRCLK 00032 * - eTPU channel 1, input signal connected to channel 1 input (eTPU2 only) 00033 * - eTPU channel 2, input signal connected to channel 2 input (eTPU2 only) 00034 * Remember to set the TBCR.AM field correspondingly. 00035 * 00036 * Features: 00037 * - Based on the selected polarity, either raising or falling signal transitions 00038 * are detected. 00039 * - There are various tooth patterns supported: 00040 * - single gap 00041 * - multiple equally spaced gaps 00042 * - an additional tooth instead of a gap 00043 * - The tooth pattern is described by 00044 * - number of teeth between two gaps (@ref teeth_till_gap), 00045 * - number of missing teeth in one gap (@ref teeth_in_gap) and 00046 * - number of teeth per one engine cycle (@ref teeth_per_cycle). 00047 * - An additional tooth instead of a gap is characterized by teeth_in_gap = 0. 00048 * - The number of angle-base counts per one tooth is configurable 00049 * (@ref ticks_per_tooth). 00050 * - The gap is recognized using an ABA test, see @ref gap_ratio. 00051 * - A noise imunity and check of unexpected acceleration/deceleration are 00052 * achieved using tooth windows (@ref win_ratio_normal, 00053 * @ref win_ratio_across_gap, @ref win_ratio_after_gap, 00054 * @ref win_ratio_after_timeout) 00055 * - The measured tooth periods can optionally be logged to an array. 00056 * - The CRANK state and the global engine position state are handled. 00057 * The CRANK state can be one of: 00058 * - @ref FS_ETPU_CRANK_SEEK 00059 * - @ref FS_ETPU_CRANK_BLANK_TIME 00060 * - @ref FS_ETPU_CRANK_BLANK_TEETH 00061 * - @ref FS_ETPU_CRANK_FIRST_TRANS 00062 * - @ref FS_ETPU_CRANK_SECOND_TRANS 00063 * - @ref FS_ETPU_CRANK_TEST_POSSIBLE_GAP 00064 * - @ref FS_ETPU_CRANK_VERIFY_GAP 00065 * - @ref FS_ETPU_CRANK_COUNTING 00066 * - @ref FS_ETPU_CRANK_COUNTING_TIMEOUT 00067 * - @ref FS_ETPU_CRANK_TOOTH_BEFORE_GAP 00068 * - @ref FS_ETPU_CRANK_TOOTH_BEFORE_GAP_NOT_HRM (only when ERRATTA_2477 is defined) 00069 * @ref FS_ETPU_CRANK_ADDITIONAL_TOOTH 00070 * - @ref FS_ETPU_CRANK_TOOTH_AFTER_GAP 00071 * The global global engine position state can be one of: 00072 - @ref FS_ETPU_ENG_POS_SEEK 00073 - @ref FS_ETPU_ENG_POS_FIRST_HALF_SYNC 00074 - @ref FS_ETPU_ENG_POS_PRE_FULL_SYNC 00075 - @ref FS_ETPU_ENG_POS_FULL_SYNC 00076 * - 8 error conditions are reported: 00077 - @ref FS_ETPU_CRANK_ERR_INVALID_TRANS - an internal error. 00078 - @ref FS_ETPU_CRANK_ERR_INVALID_MATCH - an internal error. 00079 - @ref FS_ETPU_CRANK_ERR_TIMEOUT - a transition was not detected in the 00080 expectation window. 00081 - @ref FS_ETPU_CRANK_ERR_STALL - the engine position cannot be handled any 00082 more. The synchronization algorithm will be restarted. 00083 - @ref FS_ETPU_CRANK_ERR_INTERNAL - an internal error. 00084 - @ref FS_ETPU_CRANK_ERR_TIMEOUT_BEFORE_GAP - timeout on the last tooth 00085 before gap detected. 00086 - @ref FS_ETPU_CRANK_ERR_TIMEOUT_AFTER_GAP - timeout on the first tooth 00087 after gap detected. 00088 - @ref FS_ETPU_CRANK_ERR_TOOTH_IN_GAP - a tooth was detected where the gap 00089 was expected. 00090 * - Channel interrupt is generated when: 00091 * - the global engine position state has been changed. 00092 * - once per engine cycle, on the first tooth, in full synchronization state 00093 * (FS_ETPU_ENG_POS_FULL_SYNC). 00094 * - during synchronization, when the CAM log buffer is ready. 00095 * 00096 * The Synchronization of eTPU TCR2 angle counter to the physical rotation of 00097 * the crank wheel is, from the software point of view, result of a sequence of 00098 * processing on both the eTPU and the CPU site: 00099 * -# eTPU function CRANK recognizes the gap or the additional tooth on the crank 00100 * wheel. eng_pos_state is set to HALF_SYNC. 00101 * -# eTPU function CAM starts to log cam signal transitions. It last for for 00102 * teeth_per_sync crank teeth. After that CRANK sets channel interrupt flag. 00103 * eng_pos_state is set to PRE_FULL_SYNC. 00104 * -# On the CRANK interrupt, the CPU can use the Cam Log to decode the engine 00105 * position at the interrupt (at the first tooth after gap). 00106 * The CPU writes the decoded position (TCR2 engine angle), using 00107 * @ref fs_etpu_crank_set_sync. 00108 * -# eTPU function CRANK adjusts the engine angle TCR2 value and sets 00109 * eng_pos_state to FULL_SYNC. The full synchronization is achieved. 00110 * 00111 *******************************************************************************/ 00112 /******************************************************************************* 00113 * Includes 00114 *******************************************************************************/ 00115 #include "etpu_crank.h" /* private header file */ 00116 #include "etpu_util.h" /* utility routines for working with the eTPU */ 00117 00118 /******************************************************************************* 00119 * Global variables 00120 *******************************************************************************/ 00121 extern uint32_t fs_etpu_data_ram_start; 00122 extern uint32_t fs_etpu_data_ram_ext; 00123 00124 /******************************************************************************* 00125 * FUNCTION: fs_etpu_crank_init 00126 ****************************************************************************//*! 00127 * @brief This function initializes eTPU channels to run CRANK function. 00128 * 00129 * @note The following actions are performed in order: 00130 * -# Use user-defined CPBA or allocate new eTPU DATA RAM 00131 * -# Write chan config registers and FM bits 00132 * -# Write channel and global parameters 00133 * -# Write HSR 00134 * -# Set channel priority 00135 * 00136 * @param *p_crank_instance - This is a pointer to the instance structure 00137 * @ref crank_instance_t. 00138 * @param *p_crank_config - This is a pointer to the structure of configuration 00139 * parameters @ref crank_config_t. 00140 * 00141 * @return Error codes that can be returned are: 00142 * - @ref FS_ETPU_ERROR_MALLOC - eTPU DATA RAM memory allocation error 00143 * - @ref FS_ETPU_ERROR_NONE - No error 00144 * 00145 * @warning This function does not configure the pins, only the eTPU channels. 00146 *******************************************************************************/ 00147 uint32_t fs_etpu_crank_init( 00148 struct crank_instance_t *p_crank_instance, 00149 struct crank_config_t *p_crank_config) 00150 { 00151 uint8_t chan_num; 00152 uint8_t priority; 00153 uint32_t *cpba_log; 00154 uint32_t *cpba; 00155 uint16_t misscnt_mask; 00156 00157 chan_num = p_crank_instance->chan_num; 00158 priority = p_crank_instance->priority; 00159 cpba_log = p_crank_instance->cpba_tooth_period_log; 00160 cpba = p_crank_instance->cpba; 00161 00162 /* Use user-defined CPBA or allocate new eTPU DATA RAM */ 00163 if(cpba == 0) 00164 { 00165 cpba = fs_etpu_malloc(FS_ETPU_CRANK_NUM_PARMS); 00166 if(cpba == 0) 00167 { 00168 return(FS_ETPU_ERROR_MALLOC); 00169 } 00170 else 00171 { 00172 p_crank_instance->cpba = cpba; 00173 } 00174 } 00175 00176 /* Use user-defined log or allocate new eTPU DATA RAM */ 00177 if(cpba_log == 0 00178 && p_crank_instance->log_tooth_periods == 00179 FS_ETPU_CRANK_FM1_TOOTH_PERIODS_LOG_ON) 00180 { 00181 cpba_log = fs_etpu_malloc(p_crank_instance->teeth_per_cycle<<2); 00182 if(cpba_log == 0) 00183 { 00184 return(FS_ETPU_ERROR_MALLOC); 00185 } 00186 else 00187 { 00188 p_crank_instance->cpba_tooth_period_log = cpba_log; 00189 } 00190 } 00191 00192 /* Write chan config registers and FM bits */ 00193 eTPU->CHAN[chan_num].CR.R = 00194 (FS_ETPU_CRANK_TABLE_SELECT << 24) + 00195 (FS_ETPU_CRANK_FUNCTION_NUMBER << 16) + 00196 (((uint32_t)cpba - fs_etpu_data_ram_start) >> 3); 00197 eTPU->CHAN[chan_num].SCR.R = (uint32_t)p_crank_instance->polarity 00198 + (uint32_t)p_crank_instance->log_tooth_periods; 00199 00200 /* Write channel parameters */ 00201 /* 24-bit */ 00202 *(cpba + ((FS_ETPU_CRANK_OFFSET_BLANK_TIME - 1)>>2)) = p_crank_config->blank_time; 00203 *(cpba + ((FS_ETPU_CRANK_OFFSET_TCR2_TICKS_PER_TOOTH - 1)>>2)) = p_crank_instance->tcr2_ticks_per_tooth; 00204 *(cpba + ((FS_ETPU_CRANK_OFFSET_TCR2_TICKS_PER_ADD_TOOTH- 1)>>2)) = p_crank_instance->tcr2_ticks_per_add_tooth; 00205 *(cpba + ((FS_ETPU_CRANK_OFFSET_LAST_TOOTH_TCR1_TIME - 1)>>2)) = 0; 00206 *(cpba + ((FS_ETPU_CRANK_OFFSET_LAST_TOOTH_PERIOD - 1)>>2)) = 0; 00207 *(cpba + ((FS_ETPU_CRANK_OFFSET_TCR2_ADJUSTMENT - 1)>>2)) = 0; 00208 *(cpba + ((FS_ETPU_CRANK_OFFSET_GAP_RATIO - 1)>>2)) = p_crank_config->gap_ratio; 00209 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_NORMAL - 1)>>2)) = p_crank_config->win_ratio_normal; 00210 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_ACROSS_GAP - 1)>>2)) = p_crank_config->win_ratio_across_gap; 00211 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_GAP - 1)>>2)) = p_crank_config->win_ratio_after_gap; 00212 *(cpba + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_TIMEOUT - 1)>>2)) = p_crank_config->win_ratio_after_timeout; 00213 *(cpba + ((FS_ETPU_CRANK_OFFSET_FIRST_TOOTH_TIMEOUT - 1)>>2)) = p_crank_config->first_tooth_timeout; 00214 *(cpba + ((FS_ETPU_CRANK_OFFSET_TOOTH_PERIOD_LOG - 1)>>2)) = (uint32_t)cpba_log - fs_etpu_data_ram_start; 00215 /* 8-bit */ 00216 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_TILL_GAP ) = p_crank_instance->teeth_till_gap; 00217 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_IN_GAP ) = p_crank_instance->teeth_in_gap; 00218 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_PER_CYCLE ) = p_crank_instance->teeth_per_cycle; 00219 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_PER_SYNC ) = p_crank_config->teeth_per_sync; 00220 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_GAP ) = 0; 00221 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_CYCLE) = 0; 00222 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_BLANK_TEETH ) = p_crank_config->blank_teeth; 00223 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_STATE ) = FS_ETPU_CRANK_SEEK; 00224 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_ERROR ) = FS_ETPU_CRANK_ERR_NO_ERROR; 00225 /* 16-bit */ 00226 misscnt_mask = p_crank_instance->teeth_in_gap << 13; 00227 misscnt_mask = (misscnt_mask & 0x6000) | ((misscnt_mask & 0x8000)>>5); 00228 *((uint16_t*)cpba + (FS_ETPU_CRANK_OFFSET_MISSCNT_MASK>>1)) = misscnt_mask; 00229 /* 32-bit */ 00230 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_CAM >>2)) = p_crank_instance->link_cam; 00231 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_1 >>2)) = p_crank_instance->link_1; 00232 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_2 >>2)) = p_crank_instance->link_2; 00233 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_3 >>2)) = p_crank_instance->link_3; 00234 *(cpba + (FS_ETPU_CRANK_OFFSET_LINK_4 >>2)) = p_crank_instance->link_4; 00235 00236 /* Write global parameters */ 00237 *((uint32_t*)fs_etpu_data_ram_start + ((FS_ETPU_OFFSET_ENG_CYCLE_TCR2_TICKS -1)>>2)) = 00238 p_crank_instance->tcr2_ticks_per_tooth * p_crank_instance->teeth_per_cycle; 00239 *((uint32_t*)fs_etpu_data_ram_start + ((FS_ETPU_OFFSET_ENG_CYCLE_TCR2_START -1)>>2)) = 0; 00240 *((uint8_t*)fs_etpu_data_ram_start + FS_ETPU_OFFSET_ENG_POS_STATE) = FS_ETPU_ENG_POS_SEEK; 00241 00242 /* Write HSR */ 00243 eTPU->CHAN[chan_num].HSRR.R = FS_ETPU_CRANK_HSR_INIT; 00244 00245 /* Set channel priority */ 00246 fs_etpu_enable(chan_num, priority); 00247 00248 return(FS_ETPU_ERROR_NONE); 00249 } 00250 00251 /******************************************************************************* 00252 * FUNCTION: fs_etpu_crank_config 00253 ****************************************************************************//*! 00254 * @brief This function changes the CRANK configuration. 00255 * 00256 * @note The following actions are performed in order: 00257 * -# Write configuration parameter values to eTPU DATA RAM 00258 * 00259 * @param *p_crank_instance - This is a pointer to the instance structure 00260 * @ref crank_instance_t. 00261 * @param *p_crank_config - This is a pointer to the structure of configuration 00262 * parameters @ref crank_config_t. 00263 * 00264 * @return Error codes that can be returned are: 00265 * - @ref FS_ETPU_ERROR_NONE - No error 00266 * 00267 *******************************************************************************/ 00268 uint32_t fs_etpu_crank_config( 00269 struct crank_instance_t *p_crank_instance, 00270 struct crank_config_t *p_crank_config) 00271 { 00272 uint32_t *cpba; 00273 uint32_t *cpbae; 00274 00275 cpba = p_crank_instance->cpba; 00276 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00277 00278 /* Write channel parameters */ 00279 /* 24-bit - use cpbae to prevent from overwriting bits 31:24 */ 00280 *(cpbae + ((FS_ETPU_CRANK_OFFSET_BLANK_TIME - 1)>>2)) = p_crank_config->blank_time; 00281 *(cpbae + ((FS_ETPU_CRANK_OFFSET_GAP_RATIO - 1)>>2)) = p_crank_config->gap_ratio; 00282 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_NORMAL - 1)>>2)) = p_crank_config->win_ratio_normal; 00283 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_ACROSS_GAP - 1)>>2)) = p_crank_config->win_ratio_across_gap; 00284 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_GAP - 1)>>2)) = p_crank_config->win_ratio_after_gap; 00285 *(cpbae + ((FS_ETPU_CRANK_OFFSET_WIN_RATIO_AFTER_TIMEOUT - 1)>>2)) = p_crank_config->win_ratio_after_timeout; 00286 *(cpbae + ((FS_ETPU_CRANK_OFFSET_FIRST_TOOTH_TIMEOUT - 1)>>2)) = p_crank_config->first_tooth_timeout; 00287 /* 8-bit */ 00288 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TEETH_PER_SYNC) = p_crank_config->teeth_per_sync; 00289 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_BLANK_TEETH ) = p_crank_config->blank_teeth; 00290 00291 return(FS_ETPU_ERROR_NONE); 00292 } 00293 00294 /******************************************************************************* 00295 * FUNCTION: fs_etpu_crank_get_states 00296 ****************************************************************************//*! 00297 * @brief This function reads state parameter values of the CRANK function. 00298 * 00299 * @note The following actions are performed in order: 00300 * -# Read parameter values from eTPU DATA RAM 00301 * -# Clear Crank error 00302 * 00303 * @param *p_crank_instance - This is a pointer to the instance structure 00304 * @ref crank_instance_t. 00305 * @param *p_crank_states - This is a pointer to the structure of states 00306 * @ref crank_states_t which is updated. 00307 * 00308 * @return Error codes that can be returned are: 00309 * - @ref FS_ETPU_ERROR_NONE - No error 00310 * 00311 *******************************************************************************/ 00312 uint32_t fs_etpu_crank_get_states( 00313 struct crank_instance_t *p_crank_instance, 00314 struct crank_states_t *p_crank_states) 00315 { 00316 uint32_t *cpba; 00317 uint32_t *cpbae; 00318 00319 cpba = p_crank_instance->cpba; 00320 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00321 00322 /* Read channel and global parameters */ 00323 p_crank_states->state = *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_STATE); 00324 p_crank_states->eng_pos_state = *((uint8_t*)fs_etpu_data_ram_start + FS_ETPU_OFFSET_ENG_POS_STATE); 00325 p_crank_states->tooth_counter_gap = *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_GAP); 00326 p_crank_states->tooth_counter_cycle = *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_TOOTH_COUNTER_CYCLE); 00327 p_crank_states->last_tooth_period = *(cpbae + ((FS_ETPU_CRANK_OFFSET_LAST_TOOTH_PERIOD - 1)>>2)); 00328 p_crank_states->error |= *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_ERROR); 00329 /* Clear Crank error */ 00330 *((uint8_t*)cpba + FS_ETPU_CRANK_OFFSET_ERROR) = 0; 00331 00332 return(FS_ETPU_ERROR_NONE); 00333 } 00334 00335 00336 /******************************************************************************* 00337 * FUNCTION: fs_etpu_crank_set_sync 00338 ****************************************************************************//*! 00339 * @brief This function adjusts the TCR2 angle counter and asks the eTPU to 00340 * set the global engine position status to FULL_SYNC. 00341 * 00342 * @note The following actions are performed in order: 00343 * -# Write channel parameter tcr2_adjustment 00344 * -# Write HSR FS_ETPU_CRANK_HSR_SET_SYNC 00345 * 00346 * @param *p_crank_instance - This is a pointer to the instance structure 00347 * @ref crank_instance_t. 00348 * @param tcr2_adjustment - This is the TCR2 angle value corresponding to the 00349 * fisrt tooth after the gap at which the recognized Cam log ends. 00350 * 00351 * @return Error codes that can be returned are: 00352 * - @ref FS_ETPU_ERROR_NONE - No error 00353 * 00354 *******************************************************************************/ 00355 uint32_t fs_etpu_crank_set_sync( 00356 struct crank_instance_t *p_crank_instance, 00357 uint24_t tcr2_adjustment) 00358 { 00359 uint32_t *cpba; 00360 uint32_t *cpbae; 00361 00362 cpba = p_crank_instance->cpba; 00363 cpbae = cpba + (0x4000 >> 2); /* sign-extended memory area */ 00364 00365 /* Write channel parameter - use cpbae to prevent from overwriting bits 31:24 */ 00366 *(cpbae + ((FS_ETPU_CRANK_OFFSET_TCR2_ADJUSTMENT - 1)>>2)) = tcr2_adjustment; 00367 00368 /* Write HSR */ 00369 eTPU->CHAN[p_crank_instance->chan_num].HSRR.R = FS_ETPU_CRANK_HSR_SET_SYNC; 00370 00371 return(FS_ETPU_ERROR_NONE); 00372 } 00373 00374 00375 /******************************************************************************* 00376 * FUNCTION: fs_etpu_crank_copy_tooth_period_log 00377 ****************************************************************************//*! 00378 * @brief This function copies the CRANK tooth_period_log into another array 00379 * in RAM. 00380 * 00381 * @param *p_crank_instance - This is a pointer to the instance structure 00382 * @ref crank_instance_t. 00383 * @param *p_tooth_period_log - This is a pointer where the CRANK 00384 * tooth_period_log will be copied to. The amount of data copied 00385 * in bytes is 4 * p_crank_instance->teeth_per_cycle. 00386 * 00387 * @return A pointer to a memory location just after the copied data. 00388 * 00389 *******************************************************************************/ 00390 uint24_t *fs_etpu_crank_copy_tooth_period_log( 00391 struct crank_instance_t *p_crank_instance, 00392 uint24_t *p_tooth_period_log) 00393 { 00394 uint24_t *dest; 00395 uint24_t *source; 00396 uint8_t size; 00397 00398 dest = p_tooth_period_log; 00399 source = p_crank_instance->cpba_tooth_period_log; 00400 size = p_crank_instance->teeth_per_cycle; 00401 00402 while(size--) 00403 { 00404 *dest++ = *source++; 00405 } 00406 00407 return(dest); 00408 } 00409 00410 00411 /******************************************************************************* 00412 * FUNCTION: fs_etpu_crank_get_angle_reseting 00413 ****************************************************************************//*! 00414 * @brief This function returns the engine angle as a number of TCR2 ticks 00415 * in a range 0 to (tcr2_ticks_per_tooth*teeth_per_cycle - 1), 00416 * corresponding to 0-720 degrees. 00417 * 00418 * @return A number of TCR2 ticks which determines the actual engine angle. 00419 * The value 0 corresponds to the first tooth after gap. A maximum 00420 * number is (tcr2_ticks_per_tooth*teeth_per_cycle - 1). 00421 * 00422 *******************************************************************************/ 00423 uint32_t fs_etpu_crank_get_angle_reseting(void) 00424 { 00425 uint32_t tcr2_ticks; 00426 uint32_t tcr2_start; 00427 uint32_t tcr2; 00428 00429 tcr2_ticks = fs_etpu_get_global_24(FS_ETPU_OFFSET_ENG_CYCLE_TCR2_TICKS); 00430 tcr2_start = fs_etpu_get_global_24(FS_ETPU_OFFSET_ENG_CYCLE_TCR2_START); 00431 tcr2 = eTPU->TB2R_A.R; 00432 return((0x00FFFFFF & (tcr2 + tcr2_ticks - tcr2_start)) % tcr2_ticks); 00433 } 00434 00435 00436 /******************************************************************************* 00437 * 00438 * Copyright: 00439 * Freescale Semiconductor, INC. All Rights Reserved. 00440 * You are hereby granted a copyright license to use, modify, and 00441 * distribute the SOFTWARE so long as this entire notice is 00442 * retained without alteration in any modified and/or redistributed 00443 * versions, and that such modified versions are clearly identified 00444 * as such. No licenses are granted by implication, estoppel or 00445 * otherwise under any patents or trademarks of Freescale 00446 * Semiconductor, Inc. This software is provided on an "AS IS" 00447 * basis and without warranty. 00448 * 00449 * To the maximum extent permitted by applicable law, Freescale 00450 * Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 00451 * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A 00452 * PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH 00453 * REGARD TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) 00454 * AND ANY ACCOMPANYING WRITTEN MATERIALS. 00455 * 00456 * To the maximum extent permitted by applicable law, IN NO EVENT 00457 * SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER 00458 * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 00459 * BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER 00460 * PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 00461 * 00462 * Freescale Semiconductor assumes no responsibility for the 00463 * maintenance and support of this software 00464 ******************************************************************************/ 00465 /******************************************************************************* 00466 * 00467 * REVISION HISTORY: 00468 * 00469 * FILE OWNER: Milan Brejl [r54529] 00470 * 00471 * Revision 1.1 2015/06/29 r54529 00472 * Parameter crank_instance_t.tcr2_ticks_per_add_tooth added. 00473 * Function fs_etpu_crank_get_angle_reseting added. 00474 * 00475 * Revision 1.0 2014/03/25 r54529 00476 * Minor comment and formating improvements. 00477 * Ready for eTPU Engine Control Library release 1.0. 00478 * 00479 * Revision 0.3 2013/11/28 r54529 00480 * Support of up to 7 missing teeth on eTPU2+. 00481 * 00482 * Revision 0.2 2012/11/28 r54529 00483 * Revision of instance and config structures. 00484 * 00485 * Revision 0.1 2012/07/02 r54529 00486 * Initial version of file. 00487 ******************************************************************************/
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